Commits · d3e170c4388693b6628fa91cbf78506a5fb45439 · Raul Torres / llvm-target-spread · GitLab

Feb 22, 2020
- Revert "[AMDGPU] Don’t marke the .note section as ALLOC" · d3e170c4
  Mark Searles authored Feb 21, 2020
  d3e170c4
- [lldb/test] Tweak libcxx string test on Apple+ARM devices · 8a0f0e26
  Vedant Kumar authored Feb 21, 2020
  8a0f0e26
- [MC][ELF] Error for sh_type, sh_flags or sh_entsize change · 75af9da7
  Fangrui Song authored Feb 04, 2020
  75af9da7
- [llvm-objdump] Print method name from debug info in disassembly output. · 266877a2
  Jordan Rupprecht authored Feb 21, 2020
  266877a2
- [mlir][Tutorial] Add a section to Toy Ch.2 detailing the custom assembly format. · 0050e8f0
  River Riddle authored Feb 21, 2020
  0050e8f0
- [mlir][DeclarativeParser] Add support for formatting the successors of an operation. · 9eb436fe
  River Riddle authored Feb 21, 2020
  9eb436fe
- [mlir][ODS] Add support for specifying the successors of an operation. · b1de971b
  River Riddle authored Feb 21, 2020
  b1de971b
- [mlir] Add a utility iterator range that repeats a given value `n` times. · 93813e5f
  River Riddle authored Feb 21, 2020
  93813e5f
- [mlir][DeclarativeParser] Add an 'attr-dict-with-keyword' directive · ca4ea51c
  River Riddle authored Feb 21, 2020
  ca4ea51c
- [mlir][DeclarativeParser] Add basic support for optional groups in the assembly format. · 2d0477a0
  River Riddle authored Feb 21, 2020
  2d0477a0
- [mlir][DeclarativeParser] Add support for the TypesMatchWith trait. · 26222db0
  River Riddle authored Feb 21, 2020
  26222db0
- [Analysis][Docs] Parents of loops documentation. · 393f4e8a
  Stefanos Baziotis authored Feb 21, 2020
  393f4e8a
Feb 21, 2020
- Revert "Allow customized relative PYTHONHOME" · 215a3111
  Stella Stamenova authored Feb 21, 2020
  215a3111
- [Target] Remove libObject dependency in lib/Target · a32d5397
  Francis Visoiu Mistrih authored Feb 21, 2020
  a32d5397
- [Attributor][FIX] Disable a test to unblock the builders · 528a6a1d
  Johannes Doerfert authored Feb 21, 2020
  528a6a1d
- [GISel][KnownBits] Add a cache mechanism to speed compile time · 618dec2a
  Quentin Colombet authored Feb 20, 2020
  618dec2a
- [Attributor][FIX] Undo 16188f9d until SCC iterator bug is fixed · 9708279c
  Johannes Doerfert authored Feb 21, 2020
  9708279c
- [CloneFunction] Update loop headers after cloning all blocks in loop. · 0a70edd6
  Whitney Tsang authored Feb 21, 2020
  0a70edd6
- [Hexagon] Define __ELF__ by default. · d37cbda5
  Sid Manning authored Feb 21, 2020
  d37cbda5
- [AArch64] Delete an unneeded dependency on Object after 1874dee5 · fddbff14
  Fangrui Song authored Feb 21, 2020
  fddbff14
- [AArch64][SVE] Fix -DBUILD_SHARED_LIBS=on builds after... · fad1c750
  Fangrui Song authored Feb 21, 2020
  fad1c750
- [SelectionDAG] remove unused isFast() helper function; NFC · 0ad6fc99
  Sanjay Patel authored Feb 21, 2020
  0ad6fc99
- clang/Modules: Finish renaming CompilerInstance::ModuleManager, NFC. · a6c86989
  Volodymyr Sapsai authored Feb 20, 2020
  a6c86989
- [AArch64][SVE] Fix -Wimplicit-fallthrough after D73711 · 5c33a81b
  Fangrui Song authored Feb 21, 2020
  
  5c33a81b
- [lldb/Plugins] Add ability to fetch crash information on crashed processes · d7c403e6
  Med Ismail Bennani authored Feb 21, 2020
  d7c403e6
- [lldb/test] Move `platform process list` tests to its own directory (NFC) · 1f04d1b7
  Med Ismail Bennani authored Feb 19, 2020
  1f04d1b7
- [llvm-objcopy][MachO] Change the storage of sections · dc046c70
  Alexander Shaposhnikov authored Feb 21, 2020
  dc046c70
- [AArch64][SVE] Add support for DestructiveBinary and DestructiveBinaryComm DestructiveInstTypes · a5b22b76
  Cameron McInally authored Feb 21, 2020
  a5b22b76
- AMDGPU/GlobalISel: Better code for one case of G_SHUFFLE_VECTOR on v2i16 · b72f1448
  Jay Foad authored Feb 21, 2020
  b72f1448
- [VectorCombine] refactor to reduce duplicated code; NFC · e9c79a7a
  Sanjay Patel authored Feb 21, 2020
  e9c79a7a
- [gn build] Port 1874dee5 · 8fa776b8
  LLVM GN Syncbot authored Feb 21, 2020
  
  8fa776b8
- Allow customized relative PYTHONHOME · 0bb90628
  Haibo Huang authored Feb 16, 2020
  0bb90628
- [macho][NFC] Extract all CPU_(SUB_)TYPE logic to BinaryFormat · 1874dee5
  Francis Visoiu Mistrih authored Feb 18, 2020
  1874dee5
- [X86] Add a new format type for instructions that represent named prefix bytes... · 8875ee18
  Craig Topper authored Feb 21, 2020
  8875ee18
- [IR] Update BasicBlock::validateInstrOrdering comments, NFC · 446b1500
  Reid Kleckner authored Feb 21, 2020
  446b1500
- [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE. · 33bf1196
  Francesco Petrogalli authored Feb 13, 2020
  33bf1196
- [VectorCombine] refactor cost calcs to reduce duplication; NFC · 34e34855
  Sanjay Patel authored Feb 21, 2020
  34e34855
- [llvm][aarch64] SVE addressing modes. · e2ed1d14
  Francesco Petrogalli authored Jan 28, 2020
  e2ed1d14
- Move StandardOps/Ops.h to StandardOps/IR/Ops.h · 69d757c0
  Rob Suderman authored Feb 21, 2020
  69d757c0
- [Hexagon] Simplify intrinsic (vandvrt (vandqrt q b) m) -> q if possible · d2b7c09e
  Krzysztof Parzyszek authored Feb 21, 2020
  d2b7c09e