Commits · de73404b8c4332190750537eb93ce0d5b6451300 · Raul Torres / llvm-target-spread · GitLab

Jun 12, 2019
- [AArch64] Merge globals when optimising for size · de73404b
  Sjoerd Meijer authored Jun 12, 2019
  de73404b
- [X86] Add VCMPSSZrr_Intk and VCMPSDZrr_Intk to isNonFoldablePartialRegisterLoad. · ed4cd448
  Craig Topper authored Jun 12, 2019
  ed4cd448
- [RISCV] Add CFI directives for RISCV prologue/epilog. · 04ddf39b
  Hsiangkai Wang authored Jun 12, 2019
  04ddf39b
Jun 11, 2019
- [PowerPC] Enable MachinePipeliner for P9 with -ppc-enable-pipeliner · ef2d6d99
  Jinsong Ji authored Jun 11, 2019
  ef2d6d99
- [RISCV] Add lowering of addressing sequences for PIC · a5240361
  Lewis Revill authored Jun 11, 2019
  a5240361
- [RISCV] Lower inline asm constraints I, J & K for RISC-V · 28a5cadb
  Lewis Revill authored Jun 11, 2019
  28a5cadb
- [ARM] First MVE instructions: scalar shifts. · 7bd5c55c
  Mikhail Maltsev authored Jun 11, 2019
  7bd5c55c
- [TargetLowering] Add allowsMemoryAccess(MachineMemOperand) helper wrapper. NFCI. · 266f4396
  Simon Pilgrim authored Jun 11, 2019
  266f4396
- [ARM] Fix unused-variable warning in rL363039. · 14241378
  Simon Tatham authored Jun 11, 2019
  14241378
- [ARM] Add the non-MVE instructions in Arm v8.1-M. · 8c865cac
  Simon Tatham authored Jun 11, 2019
  8c865cac
- [X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns. · 627d8168
  Craig Topper authored Jun 11, 2019
  627d8168
- Revert CMake: Make most target symbols hidden by default · 4b0b2619
  Tom Stellard authored Jun 11, 2019
  4b0b2619
- AtomicExpand: Don't crash on non-0 alloca · c5830f5f
  Matt Arsenault authored Jun 11, 2019
  c5830f5f
- AMDGPU: Expand < 32-bit atomics · 383e72fc
  Matt Arsenault authored Jun 11, 2019
  383e72fc
- CMake: Make most target symbols hidden by default · 37457130
  Tom Stellard authored Jun 10, 2019
  37457130
Jun 10, 2019
- [PowerPC][HTM]Fix $zero is not a GPRC register for builtin_ttest · 9c7f93e9
  Jinsong Ji authored Jun 10, 2019
  9c7f93e9
- [AMDGPU] Optimize image_[load|store]_mip · 9b11e93d
  Piotr Sobczak authored Jun 10, 2019
  9b11e93d
- Revert rL362953 and its followup rL362955. · 67065c5c
  Simon Tatham authored Jun 10, 2019
  67065c5c
- [ARM] Add the non-MVE instructions in Arm v8.1-M. · 42078d41
  Simon Tatham authored Jun 10, 2019
  42078d41
- [ARM] Add the non-MVE instructions in Arm v8.1-M. · baeea919
  Simon Tatham authored Jun 10, 2019
  baeea919
- [ARM] Disallow PC, and optionally SP, in VMOVRH and VMOVHR. · b87669f1
  Simon Tatham authored Jun 10, 2019
  b87669f1
- [ARM] Enable Unroll UpperBound · d847aa57
  David Green authored Jun 10, 2019
  d847aa57
- [X86] When promoting i16 compare with immediate to i32, try to use sign_extend... · 9000a72a
  Craig Topper authored Jun 10, 2019
  9000a72a
- [X86] Disable f32->f64 extload when sse2 is enabled · ceb807bb
  Craig Topper authored Jun 10, 2019
  ceb807bb
- [X86] Use EVEX instructions for f128 FAND/FOR/FXOR when avx512vl is enabled. · dd10099d
  Craig Topper authored Jun 10, 2019
  dd10099d
- [X86] Convert f32/f64 FANDN/FAND/FOR/FXOR to vector logic ops and... · f7ba8b80
  Craig Topper authored Jun 10, 2019
  f7ba8b80
Jun 09, 2019
- [X86] NFCI : Comment updation for EVEX to VEX translation. · 2a30aeb0
  Jatin Bhateja authored Jun 09, 2019
  2a30aeb0
- [AArch64][GlobalISel] Select immediate forms of cmp instructions. · 0d20969d
  Amara Emerson authored Jun 09, 2019
  0d20969d
- [X86] Remove (store (f32 (extractelt (v4f32))) isel patterns which is redundant. · 2ba0e251
  Craig Topper authored Jun 09, 2019
  2ba0e251
- [X86] Mutate scalar fceil/ffloor/ftrunc/fnearbyint/frint into X86ISD::RNDSCALE... · 7d8494c4
  Craig Topper authored Jun 08, 2019
  7d8494c4
Jun 08, 2019
- [ARM] Adjust isLegalT1AddressImmediate for non-legal types · c5471c2a
  David Green authored Jun 08, 2019
  c5471c2a
- [ARM] Add MVE addressing to isLegalT2AddressImmediate · 342d1b81
  David Green authored Jun 08, 2019
  342d1b81
- [ARM] Add fp16 addressing to isLegalT2AddressImmediate · 4ecce205
  David Green authored Jun 08, 2019
  4ecce205
- [ARM] Add HasNEON for all Neon patterns in ARMInstrNEON.td. NFCI · 10fbaa96
  David Green authored Jun 08, 2019
  10fbaa96
- [SystemZ] Fix CMakeLists.txt for alphabetical order (NFC). · bca56ab0
  Jonas Paulsson authored Jun 08, 2019
  bca56ab0
- [SystemZ, RegAlloc] Favor 3-address instructions during instruction selection. · fdc4ea34
  Jonas Paulsson authored Jun 08, 2019
  fdc4ea34
- AMDGPU: Force skips around traps · ddd2c9ac
  Matt Arsenault authored Jun 07, 2019
  ddd2c9ac
Jun 07, 2019
- [X86] Remove unnecessary new line escape from the end of a macro. NFC · bd03230c
  Craig Topper authored Jun 07, 2019
  bd03230c
- [x86] narrow extract subvector of vector select · 6880bced
  Sanjay Patel authored Jun 07, 2019
  6880bced
- [RISCV] Support Bit-Preserving FP in F/D Extensions · f720647d
  Sam Elliott authored Jun 07, 2019
  f720647d