Commits · e4b3d6b379658b4d314cb79dfd15c5ac5f6ae22c · Raul Torres / llvm-target-spread · GitLab

Oct 15, 2010
- Expand GEP handling for constant offsets. · e4b3d6b3
  Eric Christopher authored Oct 15, 2010
  e4b3d6b3
- When expanding the MOVsr[la]_flag pseudos, the CPSR implicit def becomes · d15723c2
  Jim Grosbach authored Oct 15, 2010
  d15723c2
- ARM mode encoding information for UBFX and SBFX instructions. · 68a335e1
  Jim Grosbach authored Oct 15, 2010
  68a335e1
- Remove unused ARMISD::AND selection DAG node. · 3b1db392
  Bob Wilson authored Oct 15, 2010
  3b1db392
- ARM instructions that are both predicated and set the condition codes · 59351844
  Bob Wilson authored Oct 15, 2010
  59351844
- Encoding info for extension instructions. · 118c4238
  Jim Grosbach authored Oct 15, 2010
  118c4238
- Add missing Rd encoding for MOVs instruction. · 19c6cb97
  Jim Grosbach authored Oct 14, 2010
  19c6cb97
- Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudos · 8b6a9c15
  Jim Grosbach authored Oct 14, 2010
  8b6a9c15
Oct 14, 2010
- Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx' · 062749cb
  Jim Grosbach authored Oct 14, 2010
  062749cb
- MOVi16 and MOVT ARM mode encodings. · eafcb27d
  Jim Grosbach authored Oct 14, 2010
  eafcb27d
- Simplify encoding information and add 'dst' operand info for TAILJMP. · 82291536
  Jim Grosbach authored Oct 14, 2010
  82291536
- Remove explicit dependency of LLVMARMCodeGen on LLVMARMAsmPrinter. It · 5816ccd4
  Oscar Fuentes authored Oct 14, 2010
  5816ccd4
- Handle more complex GEP based loads and add a few TODOs to deal with · 21d0c173
  Eric Christopher authored Oct 14, 2010
  21d0c173
- Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on · 6f52f8a8
  Bill Wendling authored Oct 14, 2010
  6f52f8a8
- Add encoding for 'fmstat'. · 0441c6cb
  Bill Wendling authored Oct 14, 2010
  0441c6cb
- - Add encodings for multiply add/subtract instructions in all their glory. · 0825f3e4
  Bill Wendling authored Oct 14, 2010
  0825f3e4
- Regenerate. No functional change, just cleanup. · 1f2b4bdb
  Jim Grosbach authored Oct 14, 2010
  1f2b4bdb
- Detabify and clean up 80 column violations. · d100ed85
  Jim Grosbach authored Oct 13, 2010
  d100ed85
- A few 80 column fixes. · 340cd517
  Jim Grosbach authored Oct 13, 2010
  340cd517
- trailing whitespace · b9386558
  Jim Grosbach authored Oct 13, 2010
  b9386558
- Add a FIXME. · 348013f8
  Jim Grosbach authored Oct 13, 2010
  348013f8
- Add operand encoding bits for SMC and SVC in ARM mode. · 0708e74a
  Jim Grosbach authored Oct 13, 2010
  0708e74a
- More encoding cleanup. Also add register Rd operands for indirect branches. · 16db3287
  Jim Grosbach authored Oct 13, 2010
  16db3287
Oct 13, 2010
- Simplify some ARM encoding information. · 2a4d99ab
  Jim Grosbach authored Oct 13, 2010
  2a4d99ab
- Update comment. · ef83e21b
  Eric Christopher authored Oct 13, 2010
  ef83e21b
- Add a FIXME. The ADR instruction is a bit odd. · 9874b7de
  Jim Grosbach authored Oct 13, 2010
  9874b7de
- Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern · 7e72ec66
  Jim Grosbach authored Oct 13, 2010
  7e72ec66
- Add MC encodings for VCVT* instrunctions. · f106ecfa
  Bill Wendling authored Oct 13, 2010
  f106ecfa
- Add a FIXME. · fb07ef19
  Jim Grosbach authored Oct 13, 2010
  fb07ef19
- Make a few more bits of some simple instructions explicit. nop, yield, wfe, · efc06682
  Jim Grosbach authored Oct 13, 2010
  efc06682
- Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. · 1e7db687
  Jim Grosbach authored Oct 13, 2010
  1e7db687
- Fix encoding for compares. No Rd register. · 142e3cbb
  Jim Grosbach authored Oct 13, 2010
  142e3cbb
- Add ARM mode operand encoding information for ADDE/SUBE instructions. · 651dc7c9
  Jim Grosbach authored Oct 13, 2010
  651dc7c9
- Start handling more global variables. · dd0821e7
  Eric Christopher authored Oct 13, 2010
  dd0821e7
- Limit load / store issues (at least until we have a true multi-issue aware scheduler). · 39121589
  Evan Cheng authored Oct 13, 2010
  39121589
- Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test · 6e27b4f5
  Bill Wendling authored Oct 13, 2010
  6e27b4f5
- Add encodings for VCVT instructions. · 576fd0b1
  Bill Wendling authored Oct 13, 2010
  576fd0b1
- Add ARM encoding information for comparisons, forced-cc-out arithmetics, and · 8c519c0d
  Jim Grosbach authored Oct 13, 2010
  8c519c0d
- Add VCMPZ and VABS. · da4ddf0f
  Bill Wendling authored Oct 13, 2010
  da4ddf0f
- Refactor VCMP instructions. · f9ca5354
  Bill Wendling authored Oct 13, 2010
  f9ca5354