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Commit f8d4da76 authored by Simon Pilgrim's avatar Simon Pilgrim
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[X86] Fix reciprocal instruction throughput/uops counts

Matches numbers from AMD SoG + Agner - should always be on FPU Pipes 0+1, no additional uops for folded instructions and znver1 double pumps 256-bit vectors

Noticed while adding CostKinds support to the x86 cost models
parent 14757d5b
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