Commits · 0ecfee0b9eafd75627f37e2c460818bf41b39996 · Lorenzo Albano / LLVM bpEVL · GitLab

Aug 21, 2022
- [CostModel] Add CostKind argument to getShuffleCost · 5263155d
  Simon Pilgrim authored Aug 21, 2022
  5263155d
- Revert "Use std::is_same_v instead of std::is_same (NFC)" · 8b1b0d1d
  Kazu Hirata authored Aug 20, 2022
  8b1b0d1d
- Use std::is_same_v instead of std::is_same (NFC) · c5da37e4
  Kazu Hirata authored Aug 20, 2022
  
  c5da37e4
- Use range-based for loops (NFC) · ec5eab7e
  Kazu Hirata authored Aug 20, 2022
  
  ec5eab7e
- Use llvm::drop_begin (NFC) · 8e494b85
  Kazu Hirata authored Aug 20, 2022
  
  8e494b85
- Remove redundant initialization of Optional (NFC) · 258531b7
  Kazu Hirata authored Aug 20, 2022
  
  258531b7
- Use llvm::is_contained (NFC) · 06b551c9
  Kazu Hirata authored Aug 20, 2022
  
  06b551c9
Aug 20, 2022
- [X86] Fold PMULUDQ(X,1) -> AND(X,(1<<32)-1) 'getZeroExtendInReg' · fa963835
  Simon Pilgrim authored Aug 20, 2022
  fa963835
- [NFC][AMDGPU] Fix typo. · e565e2fa
  Thomas authored Aug 20, 2022
  
  e565e2fa
- [MC][LoongArch] Make .reloc support arbitrary relocation types · 1dbe8561
  wanglei authored Aug 20, 2022
  1dbe8561
- [LoongArch] Add some fixups and relocations · c2ee21cf
  wanglei authored Aug 20, 2022
  c2ee21cf
- [LoongArch] Add codegen support for fsqrt · 1e0fe6a9
  gonglingqin authored Aug 20, 2022
  1e0fe6a9
- [AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy · b0f4678b
  Austin Kerbow authored Aug 17, 2022
  b0f4678b
Aug 19, 2022
- [RISCV] Move xori creation for scalar setccs to lowering. · 6227b7ae
  Craig Topper authored Aug 19, 2022
  6227b7ae
- [AArch64] Change aarch64_neon_pmull{,64} intrinsic ISel through a new · 945a3065
  Mingming Liu authored Aug 02, 2022
  945a3065
- [RISCV] Factor out getVectorImmCost cost after 0e7ed3 [nfc] · 59960e8d
  Philip Reames authored Aug 19, 2022
  
  59960e8d
- [InferAddressSpaces] [AMDGPU] Add inference for flat_atomic intrinsics · 20cf170e
  jeff authored Jul 28, 2022
  20cf170e
- [X86] Fix znver1 256-bit ALU/Logic/Blend uop counts · a7441289
  Simon Pilgrim authored Aug 19, 2022
  a7441289
Aug 20, 2022
- [NFC] Fix warning in asserts build · 4579a022
  Chris Bieneman authored Aug 19, 2022
  4579a022
Aug 19, 2022
- [RISCV] Correct costs for vector ceil/floor/trunc/round · e7fda463
  Philip Reames authored Aug 19, 2022
  e7fda463
- [RISCV] Add passthru operand to RISCVISD::SETCC_VL. · 961838cc
  Craig Topper authored Aug 19, 2022
  961838cc
- [RISCV] Prefer vnsrl.wi v8, v8, 0 over vnsrl.wx v8, v8, x0. · c9a41fe6
  Craig Topper authored Aug 19, 2022
  c9a41fe6
- [SLP]Cost for a constant buildvector. · 0e7ed32c
  Alexey Bataev authored Jun 02, 2022
  0e7ed32c
- [COST][NFC]Introduce OperandValueKind in getMemoryOpCost, NFC. · d53e2459
  Alexey Bataev authored Aug 19, 2022
  d53e2459
- [PowerPC] Fix bugs in sign-/zero-extension elimination · 1492c88f
  Stefan Pintilie authored Aug 16, 2022
  1492c88f
- [AArch64][GISel] Lower llvm.prefetch · 270c179a
  Archibald Elliott authored Aug 17, 2022
  270c179a
- [DirectX] Fix crash on ShuffleVectorInst in DXILBitcodeWriter · dfde731d
  Xiang Li authored Aug 17, 2022
  dfde731d
- [RISCV] Copy SDNodeFlags in lowerToScalableOp. · ba1f4cab
  Craig Topper authored Aug 18, 2022
  ba1f4cab
- [RISCV] Copy SDNodeFlags in doPeepholeMaskedRVV and doPeepholeMergeVVMFold · 5349aa23
  Craig Topper authored Aug 18, 2022
  5349aa23
- [AArch64] Enable AdrpAdd fusion for neoverse-n1 · fba0367e
  Alexander Shaposhnikov authored Aug 19, 2022
  fba0367e
- [AArch64] Add `foldCSELOfCSEL` combine. · 71f0ec24
  Karl Meakin authored Aug 19, 2022
  71f0ec24
- [RISCV] Change how mtune aliases are implemented. · 37c47b2c
  Craig Topper authored Aug 18, 2022
  37c47b2c
Aug 18, 2022
- [Hexagon] Add defaulted operator= to classes with defaulted copy ctor · 252cea03
  Krzysztof Parzyszek authored Aug 18, 2022
  252cea03
- [RISCV] Use VScaleForTuning in costing of operations whose cost depends on VL · 4d875910
  Philip Reames authored Aug 18, 2022
  4d875910
- [LV] Support fixed order recurrences. · b8709a9d
  Florian Hahn authored Aug 18, 2022
  b8709a9d
- [SVE] Extend findMoreOptimalIndexType so BUILD_VECTORs do not force 64bit indices. · 96c8d615
  Paul Walker authored Jul 24, 2022
  96c8d615
- [CostModel][X86] Adjust SLM select costs to match poor throughput of pblendvb/blendvpd/blendvps · b864cad7
  Simon Pilgrim authored Aug 18, 2022
  
  b864cad7
- [AMDGPU] Update comment on shrinking dpp. NFC · 063ee26e
  Joe Nash authored Aug 18, 2022
  
  063ee26e
- [CostModel][X86] getArithmeticInstrCost - use MUL/DIV/REM expansions for all cost kinds · 55b1a147
  Simon Pilgrim authored Aug 18, 2022
  55b1a147
- [CostModel] Replace getUserCost with getInstructionCost · fdec5018
  Simon Pilgrim authored Aug 18, 2022
  fdec5018