Commits · 13755436bb3d7853470a10ddb86fe23dabdeaea2 · Lorenzo Albano / LLVM bpEVL · GitLab

Oct 22, 2021
- [PowerPC] return early if there is no preparing candidate in the loop; NFC · 13755436
  Chen Zheng authored Oct 22, 2021
  13755436
- [Coroutines] Ignore partial lifetime markers refer of an alloca · ddbf1961
  Chuanqi Xu authored Oct 22, 2021
  ddbf1961
- [msan] Don't use TLS slots of noundef args · b7ea298d
  Vitaly Buka authored Oct 20, 2021
  b7ea298d
- [AMDGPU] Allow to use a whole register file on gfx90a for VGPRs · ca0c92d6
  Stanislav Mekhanoshin authored Oct 13, 2021
  ca0c92d6
- [Demangle] Rename OutputStream to OutputString · 2e97236a
  Luís Ferreira authored Oct 21, 2021
  2e97236a
- [DebugInfo] Expand ability to load 2-byte addresses in dwarf sections · d7733f84
  Jack Anderson authored Oct 21, 2021
  d7733f84
- [TargetLowering] Simplify the interface for expandCTPOP/expandCTLZ/expandCTTZ. · 996123e5
  Craig Topper authored Oct 21, 2021
  996123e5
- [LegalizeVectorOps][X86] Don't defer BITREVERSE expansion to LegalizeDAG. · ff37b110
  Craig Topper authored Oct 21, 2021
  ff37b110
Oct 21, 2021
- [TargetLowering][RISCV] Prevent scalarization of fixed vector bswap. · 458ed5fc
  Craig Topper authored Oct 21, 2021
  458ed5fc
- [AArch64][GlobalISel] Fold 64-bit cmps with 64-bit adds · 5dc339d9
  Jessica Paquette authored Oct 04, 2021
  5dc339d9
- BPF: emit BTF_KIND_DECL_TAG for typedef types · 0472e83f
  Yonghong Song authored Sep 20, 2021
  0472e83f
- [CodeMetrics] Don't require speculatability for ephemeral values · 18485258
  Nikita Popov authored Oct 19, 2021
  18485258
- [RISCV] Expand scalable vector CTTZ/CTLZ/CTPOP. · d55be79d
  Craig Topper authored Oct 21, 2021
  d55be79d
- Revert "[IPT] Restructure cache to allow lazy update following invalidation [NFC]" · 3781a46c
  Arthur Eubanks authored Oct 21, 2021
  3781a46c
- [VectorCombine] fold shuffle-of-binops with common operand · 66d22b4d
  Sanjay Patel authored Oct 21, 2021
  66d22b4d
- [IPT] Restructure cache to allow lazy update following invalidation [NFC] · baea663a
  Philip Reames authored Oct 21, 2021
  baea663a
- [DebugInfo] Support typedef with btf_decl_tag attributes · f6811cec
  Yonghong Song authored Sep 20, 2021
  f6811cec
- [InstCombine] generalize reassociated Demorgan folds · 3888de95
  Sanjay Patel authored Oct 21, 2021
  3888de95
- [SystemZ][z/OS] Initial implementation for lowerCall on z/OS · aa3519f1
  Anirudh Prasad authored Oct 21, 2021
  aa3519f1
- [DAGCombiner] fold bit-hack form of usubsat · d2198771
  Sanjay Patel authored Oct 21, 2021
  d2198771
- [SLP]Unify vectorization of PHI and store nodes with improved tiny tree vectorization. · 3ea7877c
  Alexey Bataev authored Sep 15, 2021
  3ea7877c
- [SVE] Fix selection failure when splitting extended masked loads · 0d153df6
  Kerry McLaughlin authored Oct 21, 2021
  0d153df6
- [MIPS] Fix switching between 32/64-bit variants of r6 target triples · 302a165e
  YunQiang Su authored Oct 21, 2021
  302a165e
- [NFC][LoopIdiom] Make for loops more readable · 9ba5bb43
  Dawid Jurczak authored Oct 21, 2021
  9ba5bb43
- [NARY-REASSOCIATE][NFC] Simplify min/max handling · 1a8ec24e
  Evgeniy Brevnov authored Oct 20, 2021
  1a8ec24e
- [SVE][Analysis] Tune the cost model according to the tune-cpu attribute · 9448cdc9
  David Sherwood authored Sep 22, 2021
  9448cdc9
- [NFC][msan] Break the loop when done · 6742c8a2
  Vitaly Buka authored Oct 20, 2021
  6742c8a2
- [SelectionDAG] Bail out of mergeTruncStores when not optimizing · 6ea7437c
  Arthur Eubanks authored Oct 11, 2021
  6ea7437c
Oct 20, 2021
- [x86] add special-case lowering for usubsat for AVX512 · 40163f1d
  Sanjay Patel authored Oct 20, 2021
  40163f1d
- [InstCombine] Fold `(a & ~b) & ~c` to `a & ~(b | c)` · b92412fb
  Stanislav Mekhanoshin authored Oct 19, 2021
  b92412fb
- [IndVars] Invalidate SCEV when IR is changed in rewriteLoopExitValue. · 8977bd58
  Florian Hahn authored Oct 20, 2021
  8977bd58
- [AArch64][GlobalISel] combine (and (or x, c1), c2) => (and x, c2) iff c1 & c2 == 0 · b046eb19
  Jon Roelofs authored Oct 14, 2021
  b046eb19
- [AMDGPU] MachineLICM cannot hoist VALU · c80d8a8c
  Stanislav Mekhanoshin authored Jul 23, 2021
  c80d8a8c
- [AMDGPU] Allow rematerialization of SOP with virtual registers · 61858356
  Stanislav Mekhanoshin authored Sep 24, 2021
  61858356
- [MC] Recursively calculate symbol offset · 5d57578a
  Leonard Grey authored Oct 20, 2021
  5d57578a
- [InstCombine] fold fake vector insert to bit-logic · 80ab06c5
  Sanjay Patel authored Oct 20, 2021
  80ab06c5
- [NFC] De-template LazyCallGraph::visitReferences() and move into .cpp file · 00500d5b
  Arthur Eubanks authored Oct 20, 2021
  00500d5b
- [IR] Refactor GlobalIFunc to inherit from GlobalObject, Remove GlobalIndirectSymbol · 08ed2160
  Itay Bookstein authored Oct 20, 2021
  08ed2160
- [WebAssembly] Add prototype relaxed float min max instructions · e1fb1340
  Zhi An Ng authored Oct 20, 2021
  e1fb1340
- [CodeGenPrepare] Avoid a scalable-vector crash in ctlz/cttz · eabf11f9
  Fraser Cormack authored Oct 20, 2021
  eabf11f9