- Jan 25, 2018
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Sanjay Patel authored
This is guarded by shouldChangeType(), so the tests show that we don't do the fold if the narrower type is not legal. Note that there is a proposal (D42424) that would change the results for the specific cases shown in these tests. That difference is also discussed in PR35792: https://bugs.llvm.org/show_bug.cgi?id=35792 Alive proofs for the cases handled here as well as the bitwise logic binops that we should already do better on: https://rise4fun.com/Alive/c97 https://rise4fun.com/Alive/Lc5E https://rise4fun.com/Alive/kdf llvm-svn: 323437
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Sanjay Patel authored
llvm-svn: 323436
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Benjamin Kramer authored
llvm-svn: 323435
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Nico Weber authored
For /arch:AVX512F: clang-cl and cl.exe both defines __AVX512F__ __AVX512CD__. clang-cl also defines __AVX512ER__ __AVX512PF__. 64-bit cl.exe also defines (according to /Bz) _NO_PREFETCHW. For /arch:AVX512: clang-cl and cl.exe both define __AVX512F__ __AVX512CD__ __AVX512BW__ __AVX512DQ__ __AVX512VL__. 64-bit cl.exe also defines _NO_PREFETCHW. So not 100% identical, but pretty close. Also refactor the existing AVX / AVX2 code to not repeat itself in both the 32-bit and 64-bit cases. https://reviews.llvm.org/D42538 llvm-svn: 323433
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Alexey Bataev authored
This reverts commit r323430 to fix buildbots. llvm-svn: 323432
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Alexander Kornienko authored
llvm-svn: 323431
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Alexey Bataev authored
Summary: If the same value is going to be vectorized several times in the same tree entry, this entry is considered to be a gather entry and cost of this gather is counter as cost of InsertElementInstrs for each gathered value. But we can consider these elements as ShuffleInstr with SK_PermuteSingle shuffle kind. Reviewers: spatel, RKSimon, mkuper, hfinkel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38697 llvm-svn: 323430
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Simon Pilgrim authored
AVX512 isn't using X86ISD::VTRUNCS and SSE/AVX isn't using PACKSS/PACKUS llvm-svn: 323428
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Hans Wennborg authored
I moved to a new machine and had to adjust a few things: - Use %USERNAME% instead of %USER% (not sure why %USER% didn't work anymore) - Update paths for using Python 3.6 instead of 3.5 - Skip building OpenMP which seems broken on Windows - Work around new vsdevcmd.bat changing paths: https://developercommunity.visualstudio.com/content/problem/26780/vsdevcmdbat-changes-the-current-working-directory.html - Build stage-0 compiler with MinSizeRel to work around VS 2017 bug: https://developercommunity.visualstudio.com/content/problem/139043/miscompile-in-trivial-c-program-with-155-preview-2.html llvm-svn: 323427
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Nico Weber authored
r213083 initially implemented /arch: support by mapping it to CPU features. Then r241077 additionally mapped it to CPU, which made the feature flags redundant (if harmless). This change here removes the redundant mapping to feature flags, and rewrites test/Driver/cl-x86-flags.c to be a bit more of an integration test that checks for preprocessor defines like AVX (like documented on MSDN) instead of for driver flags. To keep emitting warn_drv_unused_argument, use getLastArgNoClaim() followed by an explicit claim() if needed. This is in preparation for adding support for /arch:AVX512(F). No intended behavior change. https://reviews.llvm.org/D42497 llvm-svn: 323426
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Ilya Biryukov authored
Reviewers: sammccall, ioeric, hokein Reviewed By: ioeric Subscribers: klimek, cfe-commits, jkorous-apple Differential Revision: https://reviews.llvm.org/D42480 llvm-svn: 323425
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Ilya Biryukov authored
llvm-svn: 323424
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Ilya Biryukov authored
llvm-svn: 323423
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Simon Pilgrim authored
AVX512 tends to do a good job, but there are some missed opportunities with SSE/AVX llvm-svn: 323422
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Ivan A. Kosarev authored
Differential Revision: https://reviews.llvm.org/D41539 llvm-svn: 323421
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Ilya Biryukov authored
Summary: It allows to get rid of CppFile::getLastCommand and simplify the code in the upcoming threading patch. Reviewers: sammccall Reviewed By: sammccall Subscribers: klimek, jkorous-apple, ioeric, cfe-commits Differential Revision: https://reviews.llvm.org/D42429 llvm-svn: 323420
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Krasimir Georgiev authored
Summary: Consider the text proto: ``` message { sub { key: value } } ``` Previously the first `{` was TT_Unknown, which caused the inner message to be indented by the continuation width. This didn't happen for: ``` message { sub: { key: value } } ``` This is because the code to mark the first `{` as a TT_DictLiteral was only considering the case where it marches forward and reaches a `:`. This patch updates this by looking not only for `:`, but also for `<` and `{`. Reviewers: djasper Reviewed By: djasper Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D42500 llvm-svn: 323419
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Zvi Rackover authored
As pointed out in D42479, XOP also needs to be covered as it supports vector shifts with variable shift amount. llvm-svn: 323418
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Amjad Aboud authored
llvm-svn: 323416
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George Rimar authored
computeDeadSymbols accessed isLive() which was not public before. It does not make much sence to keep isLive() private because flags are available via flags() public member anyways. llvm-svn: 323415
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Jonas Devlieghere authored
This patch extends the atom types used by the Apple accelerator tables with two dsymutil extensions: - DW_ATOM_type_type_flags - DW_ATOM_qual_name_hash llvm-svn: 323414
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Kamil Rytarowski authored
We wrongly enabled additional (unwanted) branch for NetBSD. Noted by Vlad Tsyrklevich llvm-svn: 323413
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Simon Dardis authored
r317337 missed that scudo is supported on MIPS32, so permit that option for MIPS32. Reviewers: cryptoad, atanasyan Differential Revision: https://reviews.llvm.org/D42416 llvm-svn: 323412
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Mikael Holmen authored
Summary: When creating the debug fragments for a SRA'd struct, use the fields' offsets, taken from the struct layout, as the offsets for the resulting fragments. This fixes an issue where GlobalOpt would emit fragments with incorrect offsets for padded fields. This should solve PR36016. Patch by David Stenberg. Reviewers: aprantl Reviewed By: aprantl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42489 llvm-svn: 323411
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Haojian Wu authored
Reviewers: ilya-biryukov Reviewed By: ilya-biryukov Subscribers: klimek, jkorous-apple, cfe-commits, ioeric Differential Revision: https://reviews.llvm.org/D42491 llvm-svn: 323410
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Igor Laevsky authored
Differential Revision: https://reviews.llvm.org/D42412 llvm-svn: 323409
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Haojian Wu authored
Summary: * truncate symbols from static/dynamic index to the limited number (which would save lots of cost in constructing the merged symbols). * add an CLI option allowing to limit the number of returned completion results. (default to 100) Reviewers: sammccall Reviewed By: sammccall Subscribers: klimek, ilya-biryukov, jkorous-apple, ioeric, cfe-commits Differential Revision: https://reviews.llvm.org/D42484 llvm-svn: 323408
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Eugene Leviant authored
llvm-svn: 323407
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Craig Topper authored
[X86] Expand IMUL/MUL instregexs in Intel scheduler models. Add load latency to some of them in SkylakeClient model. The regular expressions and the imul names caused some instructions to be matched by multiple regexs creating unpredictable results. This changes them all to use explicit instrs instead. While doing this I also found that some instructions in Skylake were missing load latency so I fixed that too. llvm-svn: 323406
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Craig Topper authored
The IMUL instruction names mixed with the prefix matching of the instregex lead to some strange matches. The worst being that several memory instructions are using the register form latency. I don't know what the right answer is, so I've left TODOs and will try to work with the AMD folks to get this cleaned up. llvm-svn: 323405
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Don Hinton authored
Set cmake policy CMP0068=NEW, if available, and set "CMAKE_BUILD_WITH_INSTALL_NAME_DIR=On" globally to maintain current behavior. This is needed to suppress warnings on OSX starting with cmake version 3.9.6. Differential Revision: https://reviews.llvm.org/D42463 llvm-svn: 323404
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Craig Topper authored
llvm-svn: 323403
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Craig Topper authored
MMX instrutions all start with MMX_ so the 64 isn't needed for disambigutation. SSE/AVX1 instructions are assumed 128-bit so we don't need to say 128. AVX2 instructions should use a Y to indicate 256-bits. llvm-svn: 323402
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Craig Topper authored
These were treated as optional suffixes, but the regular expressions are already prefix matches so this is unnecessary. It breaks the binary search optimization in tablegen due to the top level question mark. llvm-svn: 323401
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Aditya Nandakumar authored
https://reviews.llvm.org/D42439 Add Instcombine like matchers for MachineInstructions. There are only globalISel matchers for now. llvm-svn: 323400
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Rafael Espindola authored
We can just use a member variable in MemoryRegion. llvm-svn: 323399
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Lang Hames authored
first argument. This makes lookupFlags more consistent with lookup (which takes the query as the first argument) and composes better in practice, since lookups are usually linearly chained: Each lookupFlags can populate the result map based on the symbols not found in the previous lookup. (If the maps were returned rather than passed by reference there would have to be a merge step at the end). llvm-svn: 323398
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Peter Collingbourne authored
This fixes: src/cxa_default_handlers.cpp:25:13: error: unused function 'demangling_terminate_handler' [-Werror,-Wunused-function] Patch by Thomas Anderson! Differential Revision: https://reviews.llvm.org/D42399 llvm-svn: 323397
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Rafael Espindola authored
This is similar to how we handle MemRegion. llvm-svn: 323396
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Rafael Espindola authored
llvm-svn: 323395
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