Commits · 2b624e04c718f4bdcab114618eb0a457165922a9 · Lorenzo Albano / LLVM bpEVL · GitLab

Feb 17, 2020
- [Powerpc] set instruction count as lsr first priority of lsr. · 04377a81
  Zheng Chen authored Feb 14, 2020
  04377a81
Jan 06, 2020
- [PowerPC][LoopVectorize] Extend getRegisterClassForType to consider double and... · e29a2e6b
  Jinsong Ji authored Jan 03, 2020
  e29a2e6b
Dec 27, 2019
- Delete llvm.{sig,}{setjmp,longjmp} remnant after r136821 · 7a733466
  Fangrui Song authored Dec 26, 2019
  7a733466
Dec 18, 2019
- [PowerPC] Add missing legalization for vector BSWAP · a5da8d90
  Nemanja Ivanovic authored Dec 17, 2019
  a5da8d90
Dec 12, 2019
- Rename TTI::getIntImmCost for instructions and intrinsics · 85ba5f63
  Reid Kleckner authored Dec 11, 2019
  85ba5f63
Dec 09, 2019
- [ARM] Teach the Arm cost model that a Shift can be folded into other instructions · be7a1070
  David Green authored Dec 08, 2019
  be7a1070
Nov 27, 2019
- [PowerPC] Add new Future CPU for PowerPC in LLVM · dcceab1a
  Stefan Pintilie authored Nov 27, 2019
  dcceab1a
Nov 25, 2019
- [PowerPC] Rename DarwinDirective to CPUDirective (NFC) · 85e4f5bc
  Kit Barton authored Nov 15, 2019
  85e4f5bc
Oct 28, 2019
- [PowerPC] Do not emit HW loop if the body contains calls to lrint/lround · 97e36260
  Nemanja Ivanovic authored Oct 28, 2019
  97e36260
Oct 25, 2019
- [Alignment][NFC] getMemoryOpCost uses MaybeAlign · a4783ef5
  Guillaume Chatelet authored Oct 22, 2019
  a4783ef5
Oct 12, 2019
- recommit: [LoopVectorize][PowerPC] Estimate int and float register pressure... · 9802268a
  Zi Xuan Wu authored Oct 12, 2019
  9802268a
Oct 09, 2019
- [System Model] [TTI] Update cache and prefetch TTI interfaces · 2e6f6b4d
  David Greene authored Oct 09, 2019
  2e6f6b4d
Oct 08, 2019
- Revert "[LoopVectorize][PowerPC] Estimate int and float register pressure... · 9912232b
  Jinsong Ji authored Oct 08, 2019
  9912232b
- [LoopVectorize][PowerPC] Estimate int and float register pressure separately in loop-vectorize · 9f41decc
  Zi Xuan Wu authored Oct 08, 2019
  9f41decc
Aug 26, 2019
- Recommit [PowerPC] Update P9 vector costs for insert/extract · 18db4e9a
  Roland Froese authored Aug 26, 2019
  18db4e9a
Jul 10, 2019
- Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces" · d300a493
  David Greene authored Jul 10, 2019
  d300a493
- [System Model] [TTI] Update cache and prefetch TTI interfaces · 9fdfb045
  David Greene authored Jul 10, 2019
  9fdfb045
Jul 03, 2019
- [PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop. · dfdccbb2
  Chen Zheng authored Jul 03, 2019
  dfdccbb2
Jul 02, 2019
- Revert Recommit [PowerPC] Update P9 vector costs for insert/extract element · 351b7e7b
  Jordan Rupprecht authored Jul 01, 2019
  351b7e7b
Jun 27, 2019
- Recommit [PowerPC] Update P9 vector costs for insert/extract element · 9f7f5858
  Roland Froese authored Jun 27, 2019
  9f7f5858
Jun 25, 2019
- [ExpandMemCmp] Move all options to TargetTransformInfo. · 3bc5ad55
  Clement Courbet authored Jun 25, 2019
  3bc5ad55
Jun 19, 2019
- [NFC] move some hardware loop checking code to a common place for other using. · c5b918de
  Chen Zheng authored Jun 19, 2019
  c5b918de
Jun 07, 2019
- [CodeGen] Generic Hardware Loop Support · c5ef502e
  Sam Parker authored Jun 07, 2019
  c5ef502e
May 01, 2019
- Revert "[llvm] r359313 - [PowerPC] Update P9 vector costs for insert/extract element" · fccb505f
  David L. Jones authored May 01, 2019
  fccb505f
Apr 29, 2019
- Fix operator precedence warning. NFCI. · 2755b73b
  Simon Pilgrim authored Apr 29, 2019
  2755b73b
Apr 26, 2019
- [PowerPC] Update P9 vector costs for insert/extract element · 4b17772b
  Roland Froese authored Apr 26, 2019
  4b17772b
Feb 01, 2019
- test commit (add blank line) NFC · 7f29195c
  Roland Froese authored Feb 01, 2019
  7f29195c
Jan 26, 2019
- [PowerPC] Update Vector Costs for P9 · 7d007dde
  Nemanja Ivanovic authored Jan 26, 2019
  7d007dde
Jan 19, 2019
- Update the file headers across all of the LLVM projects in the monorepo · 2946cd70
  Chandler Carruth authored Jan 19, 2019
  2946cd70
Oct 31, 2018
- [LV] Support vectorization of interleave-groups that require an epilog under · 34da6dd6
  Dorit Nuzman authored Oct 31, 2018
  34da6dd6
Oct 14, 2018
- recommit 344472 after fixing build failure on ARM and PPC. · 38bbf81a
  Dorit Nuzman authored Oct 14, 2018
  38bbf81a
- revert 344472 due to failures. · 5118c68c
  Dorit Nuzman authored Oct 14, 2018
  5118c68c
- [IAI,LV] Add support for vectorizing predicated strided accesses using masked · 81743689
  Dorit Nuzman authored Oct 14, 2018
  81743689
Jul 30, 2018
- Remove trailing space · f78650a8
  Fangrui Song authored Jul 30, 2018
  f78650a8
Mar 09, 2018
- Revert "[PowerPC] LSR tunings for PowerPC" · ef7c4976
  Stefan Pintilie authored Mar 09, 2018
  ef7c4976
Mar 07, 2018
- [PowerPC] LSR tunings for PowerPC · f8438e8e
  Stefan Pintilie authored Mar 07, 2018
  f8438e8e
Jan 30, 2018
- Re-commit : [PowerPC] Add handling for ColdCC calling convention and a pass to mark · 1f59ae31
  Zaara Syeda authored Jan 30, 2018
  1f59ae31
Jan 17, 2018
- Revert [PowerPC] This reverts commit rL322721 · c9dc7b45
  Zaara Syeda authored Jan 17, 2018
  c9dc7b45
- [PowerPC] Add handling for ColdCC calling convention and a pass to mark · 8e951fd2
  Zaara Syeda authored Jan 17, 2018
  8e951fd2
Nov 17, 2017
- Fix a bunch more layering of CodeGen headers that are in Target · b3bde2ea
  David Blaikie authored Nov 17, 2017
  b3bde2ea