Commits · 3c6edc0b2f812503a802bdd9c5842a0a9396b8c1 · Lorenzo Albano / LLVM bpEVL · GitLab

Sep 05, 2022
- [AArch64][GlobalISel] Recognise some CCMPri · 3c6edc0b
  David Green authored Sep 05, 2022
  3c6edc0b
- [AMDGPU][CodeGen] Support (base | offset) SMEM loads. · 5db8d6fd
  Ivan Kosarev authored Sep 05, 2022
  5db8d6fd
- [X86] Cleanup SLM SSE shift and CMPGTQ scheduler model numbers · bd0801cd
  Simon Pilgrim authored Sep 05, 2022
  bd0801cd
- [AMDGPU][CodeGen] Support (soffset + offset) s_buffer_load's. · f3364530
  Ivan Kosarev authored Sep 05, 2022
  f3364530
- [LoongArch] Add more fixups and relocations · bf479547
  wanglei authored Sep 05, 2022
  bf479547
- [LoongArch] Add codegen support for fcopysign · bc743bf6
  gonglingqin authored Sep 05, 2022
  bc743bf6
- Revert "[llvm] Use range-based for loops (NFC)" · 6c52736e
  Vitaly Buka authored Sep 04, 2022
  6c52736e
Sep 04, 2022
- [CostModel][X86] Add CostKinds handling for sqrt intrinsicc · 8534f514
  Simon Pilgrim authored Sep 04, 2022
  8534f514
- [CostModel][X86] getTypeBasedIntrinsicInstrCost - convert to CostKindTblEntry · 626a84db
  Simon Pilgrim authored Sep 04, 2022
  626a84db
- Revert rG06e73626cf0fc33b025a0f98f1eee4a302279982 "[CostModel][X86]... · 80d4b3a2
  Simon Pilgrim authored Sep 04, 2022
  80d4b3a2
- [CostModel][X86] getTypeBasedIntrinsicInstrCost - convert to CostKindTblEntry · 06e73626
  Simon Pilgrim authored Sep 04, 2022
  06e73626
- [CostModel][X86] Remove redundant AVX512 v64i8 shift costs · 59dbd6a0
  Simon Pilgrim authored Sep 04, 2022
  59dbd6a0
- [CostModel][X86] Add CostKinds handling for mul ops · c444af1c
  Simon Pilgrim authored Sep 04, 2022
  c444af1c
- [llvm] Use range-based for loops (NFC) · 7d8c2d17
  Kazu Hirata authored Sep 03, 2022
  7d8c2d17
Sep 03, 2022
- [llvm] Qualify auto in range-based for loops (NFC) · 86e8164a
  Kazu Hirata authored Sep 03, 2022
  86e8164a
- Drop empty string literals from static_assert (NFC) · 32aa35b5
  Kazu Hirata authored Sep 03, 2022
  32aa35b5
- [llvm] Use std::enable_if_t (NFC) · 9eca5ed7
  Kazu Hirata authored Sep 03, 2022
  
  9eca5ed7
- [llvm] Use range-based for loops (NFC) · fedc5973
  Kazu Hirata authored Sep 03, 2022
  
  fedc5973
- [CostModel][X86] Adjust mul v4i32/v8i32 throughput cost · 444685de
  Simon Pilgrim authored Sep 03, 2022
  444685de
- [CostModel][X86] Add CostKinds handling for add/sub ops · 114b7762
  Simon Pilgrim authored Sep 03, 2022
  114b7762
- [CostModel][X86] Add CostKinds handling for fdiv ops · 5aee2726
  Simon Pilgrim authored Sep 03, 2022
  5aee2726
- [X86] Fix fdiv throughput/latency/uops counts · bddbd408
  Simon Pilgrim authored Sep 03, 2022
  bddbd408
- [CostModel][X86] Add fdiv(double) throughput x87 costs for · 1c12e121
  Simon Pilgrim authored Sep 03, 2022
  
  1c12e121
- [X86] Fix fmul throughput/latency/uops counts · bd956b7d
  Simon Pilgrim authored Sep 03, 2022
  bd956b7d
- [CostModel][X86] Add CostKinds handling for fmul ops · 0735200e
  Simon Pilgrim authored Sep 03, 2022
  0735200e
- [CostModel][X86] Remove unused float x87 costs · 82090cb8
  Simon Pilgrim authored Sep 03, 2022
  82090cb8
- [CostModel][AArch64] Fix ctpop intrinsic cost when NEON is disabled. · b219a9c0
  Eli Friedman authored Sep 02, 2022
  b219a9c0
Sep 02, 2022
- [AArch64][TTI] Add cost table entry for trunc over vector of integers. · 242203d2
  Mingming Liu authored Aug 29, 2022
  242203d2
- Revert rG11765b77be84d793ebedc5b5436c463490746131 "[CostModel][X86] Add... · 116d8f8c
  Simon Pilgrim authored Sep 02, 2022
  116d8f8c
- [CostModel][X86] Add CostKinds handling for fmul ops · 11765b77
  Simon Pilgrim authored Sep 02, 2022
  11765b77
- [CostModel][X86] Add CostKinds to SSE42 fadd/fsub/fneg ops · 6941b1f6
  Simon Pilgrim authored Sep 02, 2022
  6941b1f6
- [AMDGPU][NFC] Fix typo in commment: replace SiMemOpInfo by SIMemOpInfo · ee761374
  Juan Manuel MARTINEZ CAAMAÑO authored Sep 02, 2022
  
  ee761374
- [CostModel][X86] Add CostKinds handling for fadd/fsub/fneg ops · ad16f3e4
  Simon Pilgrim authored Sep 02, 2022
  ad16f3e4
- [LoongArch] Support lowering br_jt · 2dd434c3
  WANG Xuerui authored Sep 02, 2022
  2dd434c3
- [RISCV] Rename some V extension multiclasses for consistency. NFC · 11881a8f
  Craig Topper authored Sep 01, 2022
  11881a8f
- [AArch64InstPrinter] Add some `<reg:...>` for llvm-mc --mdis output · 1b726f0a
  Fangrui Song authored Sep 01, 2022
  
  1b726f0a
- [X86InstPrinter] Introduce markup tags emission · f0c50447
  Antonio Frighetto authored Sep 01, 2022
  f0c50447
- [AArch64InstPrinter] Introduce immediate markup tags emission · 4e990797
  Antonio Frighetto authored Sep 01, 2022
  4e990797
- [MipsInstPrinter] Introduce markup tags emission · cbb2141f
  Antonio Frighetto authored Sep 01, 2022
  cbb2141f
Sep 01, 2022
- [X86] Fix reciprocal instruction throughput/uops counts · f8d4da76
  Simon Pilgrim authored Sep 01, 2022
  f8d4da76