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  1. Jul 14, 2017
    • Davide Italiano's avatar
      [AMDGPU] Garbage collect dead code. NFCI. · 502ac724
      Davide Italiano authored
      Unbreaks the build with GCC7.
      
      llvm-svn: 308047
      502ac724
    • Nico Weber's avatar
      Fix link in docs. · a8c09791
      Nico Weber authored
      llvm-svn: 308046
      a8c09791
    • Kostya Serebryany's avatar
      do more processing in clang-fuzzer (use EmitAssemblyAction) · 8328133d
      Kostya Serebryany authored
      Summary: use EmitAssemblyAction in clang-fuzzer
      
      Reviewers: klimek, rsmith
      
      Reviewed By: klimek
      
      Subscribers: cfe-commits, mgorny
      
      Differential Revision: https://reviews.llvm.org/D34267
      
      llvm-svn: 308045
      8328133d
    • Nico Weber's avatar
      Add documentation for @available · 11cafc82
      Nico Weber authored
      https://reviews.llvm.org/D35379
      
      llvm-svn: 308044
      11cafc82
    • Sterling Augustine's avatar
      Prevent ClangTools from generating dependency files. · 78f46124
      Sterling Augustine authored
      D34304 created a way for ToolInvocations to conditionally generate
      dependency files, and updated call sites to preserve the old behavior
      of not generating them by default. CompilerInvocations...
      
      Summary:
      ...are yet another
      call-path that needs updating to preserve the old behavior.
      
      Reviewers: klimek, echristo
      
      Reviewed By: echristo
      
      Subscribers: echristo, cfe-commits
      
      Differential Revision: https://reviews.llvm.org/D35131
      
      llvm-svn: 308043
      78f46124
    • Craig Topper's avatar
      [TableGen][MC] Fix a few places where we didn't hide the underlying type of LaneBitmask very well. · 4fa0cdbb
      Craig Topper authored
      One place compared with 32, which I've replaced with LaneBitmask::BitWidth.
      
      The other places are shifts of a constant 1 by a lane number. But if LaneBitmask were to be a larger type than 32-bits like 64-bits, the 1 would need to be 1ULL to do a 64-bit shift. To hide this I've added a LanebitMask::getLane that hides the shift and make sures the 1 is casted to correct type first.
      
      llvm-svn: 308042
      4fa0cdbb
    • Jakub Kuderski's avatar
      [Dominators] Update Clang's DominatorTree to use the new template argument · 581677fd
      Jakub Kuderski authored
      Summary: This patch makes the Clang's DominatorTree use the new IsPostDom template argument for DominatorTreeBase.
      
      Reviewers: dberlin, sanjoy, davide, grosser
      
      Reviewed By: dberlin
      
      Subscribers: llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D35316
      
      llvm-svn: 308041
      581677fd
    • Jakub Kuderski's avatar
      [Dominators] Make IsPostDominator a template parameter · b292c22c
      Jakub Kuderski authored
      Summary:
      DominatorTreeBase used to have IsPostDominators (bool) member to indicate if the tree is a dominator or a postdominator tree. This made it possible to switch between the two 'modes' at runtime, but it isn't used in practice anywhere.
      
      This patch makes IsPostDominator a template argument. This way, it is easier to switch between different algorithms at compile-time based on this argument and design external utilities around it. It also makes it impossible to incidentally assign a postdominator tree to a dominator tree (and vice versa), and to further simplify template code in GenericDominatorTreeConstruction.
      
      Reviewers: dberlin, sanjoy, davide, grosser
      
      Reviewed By: dberlin
      
      Subscribers: mzolotukhin, llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D35315
      
      llvm-svn: 308040
      b292c22c
    • Alfred Huang's avatar
      [AMDGPU] Do not insert an instruction into worklist twice in movetovalu · 5b27072f
      Alfred Huang authored
      In moveToVALU(), move to vector ALU is performed, all instrs in
      the use chain will be visited. We do not want the same node to be
      pushed to the visit worklist more than once.
      
      Differential Revision: https://reviews.llvm.org/D34726
      
      llvm-svn: 308039
      5b27072f
    • Aaron Ballman's avatar
      Unconditionally use .init_array instead of .ctors on Solaris. · 4a6d7d45
      Aaron Ballman authored
      Patch by Fedor Sergeev
      
      llvm-svn: 308038
      4a6d7d45
    • Alexander Shaposhnikov's avatar
      [clang] Add getSignedSizeType method · 1e898d91
      Alexander Shaposhnikov authored
      C11 standard refers to the signed counterpart of the type size_t in
      the paragraph 7.21.6.1 where it defines d, i, o, u, x, or x conversion specifiers
      (in printf format string).
      In Clang there is a FIXME (in lib/Analysis/PrintfFormatString.cpp) for this case
      (which is not handled correctly at the moment).
      This diff adds getSignedSizeType method to TargetInfo and exposes it 
      in ASTContext similarly to how it is done for getSizeType.
      lib/Analysis/PrintfFormatString.cpp will be changed in a separate commit.
      
      Differential revision: https://reviews.llvm.org/D35378
      
      Test plan: make check-all
      
      llvm-svn: 308037
      1e898d91
    • Jakub Kuderski's avatar
      [Dominators] Simplify block and node printing · e1c46554
      Jakub Kuderski authored
      Summary:
      This patch adds `BlockPrinter`-- a small wrapper for printing CFG nodes and DomTree nodes to `raw_ostream`. It is meant to be only used internally, for debugging and printing errors.
      
      Reviewers: dberlin, sanjoy, grosser, davide
      
      Reviewed By: grosser, davide
      
      Subscribers: llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D35286
      
      llvm-svn: 308036
      e1c46554
    • Krzysztof Parzyszek's avatar
      [Hexagon] Add intrinsics for data cache operations · 92b5c3f5
      Krzysztof Parzyszek authored
      This is the clang part, adding support for
        void __builtin_HEXAGON_Y2_dccleana(void*);
        void __builtin_HEXAGON_Y2_dccleaninva(void*);
        void __builtin_HEXAGON_Y2_dcinva(void*);
        void __builtin_HEXAGON_Y2_dczeroa(void*);
        void __builtin_HEXAGON_Y4_l2fetch(void*, unsigned);
        void __builtin_HEXAGON_Y5_l2fetch(void*, unsigned long long);
      Requires r308032.
      
      llvm-svn: 308035
      92b5c3f5
    • George Rimar's avatar
      [ELF] - Update testcases after LLVM update. (D35351) · b444efb9
      George Rimar authored
      llvm-svn: 308034
      b444efb9
    • George Rimar's avatar
      [llvm-readobj] - Teach readobj to print DT_FILTER dynamic tag in human readable form. · efd3ffb2
      George Rimar authored
      Nothing special here, output format is similar to the format
      used by binutils readelf and ELF Tool Chain readelf.
      
      Differential revision: https://reviews.llvm.org/D35351
      
      llvm-svn: 308033
      efd3ffb2
    • Krzysztof Parzyszek's avatar
      [Hexagon] Add intrinsics for data cache operations · 9c084fc5
      Krzysztof Parzyszek authored
      This is the LLVM part, adding definitions for
        void @llvm.hexagon.Y2.dccleana(i8*)
        void @llvm.hexagon.Y2.dccleaninva(i8*)
        void @llvm.hexagon.Y2.dcinva(i8*)
        void @llvm.hexagon.Y2.dczeroa(i8*)
        void @llvm.hexagon.Y4.l2fetch(i8*, i32)
        void @llvm.hexagon.Y5.l2fetch(i8*, i64)
      The clang part will follow.
      
      llvm-svn: 308032
      9c084fc5
    • Sanjay Patel's avatar
      [InstCombine] convert bitwise (in)equality checks to logical ops (PR32401) · 3f4db3ea
      Sanjay Patel authored
      As discussed in:
      https://bugs.llvm.org/show_bug.cgi?id=32401
      
      we have a backend transform to undo this:
      https://reviews.llvm.org/rL299542
      
      when it's likely that the xor version leads to better codegen, but we want 
      this form in IR for better analysis and simplification potential.
      
      llvm-svn: 308031
      3f4db3ea
    • Simon Dardis's avatar
      Revert "Reland "[mips][mt][6/7] Add support for mftr, mttr instructions."" · 45b2277a
      Simon Dardis authored
      FileCheck is crashing on in the input file, so reverting again while
      I investigate.
      
      This reverts r308023.
      
      llvm-svn: 308030
      45b2277a
    • Sanjay Patel's avatar
      [InstCombine] add tests for PR32401; NFC · 22abfdfe
      Sanjay Patel authored
      Also, add comments to a couple of tests that could be moved out of instcombine.
      
      llvm-svn: 308029
      22abfdfe
    • Jonas Paulsson's avatar
      [SystemZ] Minor fixing in SystemZScheduleZ196.td · b144af49
      Jonas Paulsson authored
      Some minor corrections for the recently added instructions.
      
      Review: Ulrich Weigand
      llvm-svn: 308028
      b144af49
    • Sanjay Patel's avatar
      [InstCombine] auto-generate complete test checks; NFC · 0439d764
      Sanjay Patel authored
      llvm-svn: 308027
      0439d764
    • Nirav Dave's avatar
      Improve Aliasing of operations to static alloca · a8f63af9
      Nirav Dave authored
      Recommiting after adding check to avoid miscomputing alias information
      on addresses of the same base but different subindices.
      
      Memory accesses offset from frame indices may alias, e.g., we
      may merge write from function arguments passed on the stack when they
      are contiguous. As a result, when checking aliasing, we consider the
      underlying frame index's offset from the stack pointer.
      
      Static allocs are realized as stack objects in SelectionDAG, but its
      offset is not set until post-DAG causing DAGCombiner's alias check to
      consider access to static allocas to frequently alias. Modify isAlias
      to consider access between static allocas and access from other frame
      objects to be considered aliasing.
      
      Many test changes are included here. Most are fixes for tests which
      indirectly relied on our aliasing ability and needed to be modified to
      preserve their original intent.
      
      The remaining tests have minor improvements due to relaxed
      ordering. The exception is CodeGen/X86/2011-10-19-widen_vselect.ll
      which has a minor degradation dispite though the pre-legalized DAG is
      improved.
      
      Reviewers: rnk, mkuper, jonpa, hfinkel, uweigand
      
      Reviewed By: rnk
      
      Subscribers: sdardis, nemanjai, javed.absar, llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D33345
      
      llvm-svn: 308025
      a8f63af9
    • Jonas Paulsson's avatar
      [SystemZ] Enable LoopDataPrefetch pass. · 89ca10de
      Jonas Paulsson authored
      Loop data prefetching has shown some improvements on benchmarks, and is
      enabled at -O1 and above.
      
      Review: Ulrich Weigand
      llvm-svn: 308024
      89ca10de
    • Simon Dardis's avatar
      Reland "[mips][mt][6/7] Add support for mftr, mttr instructions."" · b3529841
      Simon Dardis authored
      Unlike many other instructions, these instructions have aliases which
      take coprocessor registers, gpr register, accumulator (and dsp accumulator)
      registers, floating point registers, floating point control registers and
      coprocessor 2 data and control operands.
      
      For the moment, these aliases are treated as pseudo instructions which are
      expanded into the underlying instruction. As a result, disassembling these
      instructions shows the underlying instruction and not the alias.
      
      Reviewers: slthakur, atanasyan
      
      Differential Revision: https://reviews.llvm.org/D35253
      
      The last version of this patch broke one of the expensive checks buildbots,
      this version changes the failing test/MC/Mips/mt/invalid.s and other invalid
      tests to write the errors to a file and run FileCheck on that, rather than
      relying on the 'not llvm-mc ... <%s 2>&1 | Filecheck %s' idiom.
      
      Hopefully this will sarisfy the buildbot.
      
      llvm-svn: 308023
      b3529841
    • Gabor Horvath's avatar
      [clang-tidy] Minor documentation fix. NFC. · 5aae773d
      Gabor Horvath authored
      llvm-svn: 308022
      5aae773d
    • Gabor Horvath's avatar
      [clang-tidy] Add bugprone-undefined-memory-manipulation check · 46a9db45
      Gabor Horvath authored
      Patch by: Reka Nikolett Kovacs
      
      Differential Revision: https://reviews.llvm.org/D35051
      
      llvm-svn: 308021
      46a9db45
    • Gabor Horvath's avatar
      [clang-tidy] Add bugprone-suspicious-memset-usage check · 829e75a0
      Gabor Horvath authored
      Created new module bugprone and placed the check in that.
      
      Finds memset() calls with potential mistakes in their arguments.
      Replaces and extends the existing google-runtime-memset-zero-length check.
      
      Cases covered:
      * Fill value is a character '0'. Integer 0 might have been intended.
      * Fill value is out of char range and gets truncated.
      * Byte count is zero. Potentially swapped with the fill value argument.
      
      Patch by: Reka Nikolett Kovacs
      
      Differential Revision: https://reviews.llvm.org/D32700
      
      llvm-svn: 308020
      829e75a0
    • Dmitry Vyukov's avatar
      tsan: optimize sync clock memory consumption · 9f2c6207
      Dmitry Vyukov authored
      This change implements 2 optimizations of sync clocks that reduce memory consumption:
      
      Use previously unused first level block space to store clock elements.
      Currently a clock for 100 threads consumes 3 512-byte blocks:
      
      2 64-bit second level blocks to store clock elements
      +1 32-bit first level block to store indices to second level blocks
      Only 8 bytes of the first level block are actually used.
      With this change such clock consumes only 2 blocks.
      
      Share similar clocks differing only by a single clock entry for the current thread.
      When a thread does several release operations on fresh sync objects without intervening
      acquire operations in between (e.g. initialization of several fields in ctor),
      the resulting clocks differ only by a single entry for the current thread.
      This change reuses a single clock for such release operations. The current thread time
      (which is different for different clocks) is stored in dirty entries.
      
      We are experiencing issues with a large program that eats all 64M clock blocks
      (32GB of non-flushable memory) and crashes with dense allocator overflow.
      Max number of threads in the program is ~170 which is currently quite unfortunate
      (consume 4 blocks per clock). Currently it crashes after consuming 60+ GB of memory.
      The first optimization brings clock block consumption down to ~40M and
      allows the program to work. The second optimization further reduces block consumption
      to "modest" 16M blocks (~8GB of RAM) and reduces overall RAM consumption to ~30GB.
      
      Measurements on another real world C++ RPC benchmark show RSS reduction
      from 3.491G to 3.186G and a modest speedup of ~5%.
      
      Go parallel client/server HTTP benchmark:
      https://github.com/golang/benchmarks/blob/master/http/http.go
      shows RSS reduction from 320MB to 240MB and a few percent speedup.
      
      Reviewed in https://reviews.llvm.org/D35323
      
      llvm-svn: 308018
      9f2c6207
    • Zoran Jovanovic's avatar
      Reverting commit 308011. · 0e039351
      Zoran Jovanovic authored
      llvm-svn: 308017
      0e039351
    • Ilya Biryukov's avatar
      [index] Added a method indexTopLevelDecls to run indexing on a list of Decls. · 00f5f295
      Ilya Biryukov authored
      Summary:
      We need it in clangd for refactoring that replaces ASTUnit
      with manual AST management.
      
      Reviewers: akyrtzi, benlangmuir, arphaman, klimek
      
      Reviewed By: arphaman
      
      Subscribers: cfe-commits
      
      Differential Revision: https://reviews.llvm.org/D35405
      
      llvm-svn: 308016
      00f5f295
    • Alexander Kornienko's avatar
      [Clang-Tidy] Preserve Message, FileOffset, FilePath in Clang-Tidy YAML output · 8b4fcb71
      Alexander Kornienko authored
      Summary:
      To get properly integration Clang-Tidy with CLion IDE, next things were implemented:
      * Preserve `Message`, `FileOffset`, `FilePath` in the clang-tidy output.
      * Export all diagnostics, not just the ones with fixes
      * Test-cases
      
      Reviewers: alexfh, ilya-biryukov
      
      Subscribers: mgorny, JDevlieghere, xazax.hun, cfe-commits
      
      Tags: #clang-tools-extra
      
      Patch by Vladimir Plyashkun!
      
      Differential Revision: https://reviews.llvm.org/D35349
      
      llvm-svn: 308015
      8b4fcb71
    • Alexander Kornienko's avatar
      [Clang-Tidy] Preserve Message, FileOffset, FilePath in Clang-Tidy YAML output · 2745e179
      Alexander Kornienko authored
      Summary:
      To get properly integration Clang-Tidy with CLion IDE, next things were implemented:
      1) Preserve `Message`, `FileOffset`, `FilePath` in the clang-tidy output.
      2) Export all diagnostics, not just the ones with fixes
      3) Test-cases
      
      Reviewers: klimek, ilya-biryukov, alexfh
      
      Reviewed By: alexfh
      
      Subscribers: alexfh, JDevlieghere, mgorny, xazax.hun, cfe-commits, klimek
      
      Tags: #clang-tools-extra
      
      Patch by Vladimir Plyashkun!
      
      Differential Revision: https://reviews.llvm.org/D34404
      
      llvm-svn: 308014
      2745e179
    • Tobias Grosser's avatar
      update isl to: isl-0.18-791-ga22eb92 · 231179ac
      Tobias Grosser authored
      This is a regular maintenance update
      
      llvm-svn: 308013
      231179ac
    • Erik Verbruggen's avatar
      [analyzer] Add annotation for functions taking user-facing strings · 49db0306
      Erik Verbruggen authored
      There was already a returns_localized_nsstring annotation to indicate
      that the return value could be passed to UIKit methods that would
      display them. However, those UIKit methods were hard-coded, and it was
      not possible to indicate that other classes/methods in a code-base would
      do the same.
      
      The takes_localized_nsstring annotation can be put on function
      parameters and selector parameters to indicate that those will also show
      the string to the user.
      
      Differential Revision: https://reviews.llvm.org/D35186
      
      llvm-svn: 308012
      49db0306
    • Zoran Jovanovic's avatar
      [mips][microMIPS] Extending size reduction pass with ADDIUSP and ADDIUR1SP · d374c599
      Zoran Jovanovic authored
      Author: milena.vujosevic.janicic
      Reviewers: sdardis
      The patch extends size reduction pass for MicroMIPS.
      The following instructions are examined and transformed, if possible:
      ADDIU instruction is transformed into 16-bit instruction ADDIUSP
      ADDIU instruction is transformed into 16-bit instruction ADDIUR1SP
      Function InRange is changed to avoid left shifting of negative values, since 
      that caused some sanitizer tests to fail (so the previous patch 
      Differential Revision: https://reviews.llvm.org/D34511
      
      llvm-svn: 308011
      d374c599
    • Siddharth Bhat's avatar
      [PPCGCodeGeneration] Fix runtime check adjustments since they make assumptions about BB layout. · 03346c27
      Siddharth Bhat authored
      - There is a conditional branch that is used to switch between the old
         and new versions of the code.
      
      - If we detect that the build was unsuccessful, `PPCGCodeGeneration` will
        change the runtime check to be always set to false.
      
      - To actually *reach* this runtime check instruction, `PPCGCodeGeneration`
        was using assumptions about the layout of the BBs.
      
      - However, invariant load hoisting violates this assumption by inserting
        an extra basic block in the middle.
      
      - Fix the assumption on the layout by having `createScopConditionally`
         return the conditional branch instruction.
      
      - Use this reference to set to always-false.
      
      llvm-svn: 308010
      03346c27
    • Diana Picus's avatar
      [ARM] GlobalISel: Support G_BRCOND · 87a70679
      Diana Picus authored
      Insert a TSTri to set the flags and a Bcc to branch based on their
      values. This is a bit inefficient in the (common) cases where the
      condition for the branch comes from a compare right before the branch,
      since we set the flags both as part of the compare lowering and as part
      of the branch lowering. We're going to live with that until we settle on
      a principled way to handle this kind of situation, which occurs with
      other patterns as well (combines might be the way forward here).
      
      llvm-svn: 308009
      87a70679
    • Olivier Goffart's avatar
      Keep the IdentifierInfo in the Token for alternative operator keyword · 90f981bc
      Olivier Goffart authored
      The goal of this commit is to fix clang-format so it does not merge tokens when
      using the alternative spelling keywords. (eg: "not foo" should not become "notfoo")
      
      The problem is that Preprocessor::HandleIdentifier used to drop the identifier info
      from the token for these keyword. This means the first condition of
      TokenAnnotator::spaceRequiredBefore is not met. We could add explicit check for
      the spelling in that condition, but I think it is better to keep the IdentifierInfo
      and handle the operator keyword explicitly when needed. That actually leads to simpler
      code, and probably slightly more efficient as well.
      
      Another side effect of this change is that __identifier(and) will now work as
      one would expect, removing a FIXME from the MicrosoftExtensions.cpp test
      
      Differential Revision: https://reviews.llvm.org/D35172
      
      llvm-svn: 308008
      90f981bc
    • Jonas Paulsson's avatar
      [SystemZ] Minor fixing in SystemZScheduleZEC12.td · a84f9f53
      Jonas Paulsson authored
      Some minor corrections for the recently added instructions.
      
      Review: Ulrich Weigand
      llvm-svn: 308007
      a84f9f53
    • Renato Golin's avatar
      [RelTest] Diana is doing both releases now · d806b498
      Renato Golin authored
      llvm-svn: 308006
      d806b498
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