In llvm commit r243581, a reverse range adapter was added which allows
us to change code such as

  for (auto I = Fields.rbegin(), E = Fields.rend(); I != E; ++I) {

in to

  for (const FieldDecl *I : llvm::reverse(Fields))

This commit changes a few of the places in clang which are eligible to use
this new adapter.

llvm-svn: 243663

I'm not sure what reasons the comment here could have
had for not setting these. Without these set, there is
an assertion hit during DWARF emission.

llvm-svn: 243661

Copy implementation of applyFixup from AArch64 with AArch64 bits
ripped out.

Tests will be included with a later commit. Several other
problems must be fixed before binary debug info emission
will work.

llvm-svn: 243660

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 243659

llvm-svn: 243658

These tests were creating a modules.idx file in my clang checkout, not
the build directory or temp.

All the other tests in this directory use -fmodules-cache-path=%t so
updated these to match.

llvm-svn: 243657

Copying the already existing code for x86 to ARM to set the correct CPU
features when using -mcpu=native. We can already detect the CPU name
but we were not setting the correct feature bits.

Moving fpu/hwdiv down to make sure they override whatever we set the
default to be.

No tests because this is native detection, and not all ARM-enabled builds
will hapen at a specific CPU, or even ARM. I have tested locally and it
works as expected.

Fixes PR12794.

llvm-svn: 243656

Summary:
Replace the switch on instruction opcode with a switch on register size.
This way we don't need to update the switch statement when we add new
SMRD variants.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11601

llvm-svn: 243652

Summary:
This function is never called.  isReallyTriviallyReMaterializable() is
the function that should be implemented instead.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11620

llvm-svn: 243651

Summary:
Patch by Nitesh Jain and Jaydeep Patil with a small revision to use ABIs rather
than Architecture Revisions (which currently imply particular ABIs).

Fixes test_demangle.pass.cpp (PR24149).

Subscribers: mclow.lists, jaydeep, nitesh.jain, hans, cfe-commits

Differential Revision: http://reviews.llvm.org/D11483

llvm-svn: 243645

The memory-sanitizer build bot reported:

==5574== WARNING: MemorySanitizer: use-of-uninitialized-value
    #0 0x7f03089e15f6 in
clang::Parser::TryAltiVecTokenOutOfLine(clang::DeclSpec&,
clang::SourceLocation, char const*&, unsigned int&, bool&)
/mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/tools/clang/lib/Parse/ParseDecl.cpp:6290:11

This is because the "Ident_pixel" variable was uninitialized
in the getLangOpts().ZVector case, but we'd still call into
clang::Parser::TryAltiVecTokenOutOfLine, which uses the variable.

The simplest fix for this without sprinkling !getLangOpts().ZVector
checks all over the code seems to be to just initialize the variable
to nullptr; this will then do the right thing on ZVector.

Checked in to unbreak the build bots.

llvm-svn: 243644

This patch adds support for the System Z vector built-in functions.
The API-defined header file has the name vecintrin.h.

The user-level functions are defined in the same style as the clang
version of altivec.h, making heavy use of the __overloadable__ and
__always_inline__ attributes.  Where possible the functions expand to
generic operations rather than specific built-in functions, in the hope
that that form can be optimised better.

Where a built-in routine is specified to require an immediate integer
argument, the __enable_if__ attribute is used to verify the argument is
in fact constant and in the appropriate range.

Based on a patch by Richard Sandiford.

llvm-svn: 243643

The z13 vector facility has an associated language extension,
closely modeled on AltiVec/VSX.  The main differences are:

- vector long, vector float and vector pixel are not supported

- vector long long and vector double are supported (like VSX)

- comparison operators return a vector rather than a scalar integer

- shift operators behave like the OpenCL shift operators

- vector bool is only supported as argument to certain operators;
  some operators allow mixing a bool with a non-bool vector 

This patch adds clang support for the extension.  It is closely modelled
on the AltiVec support.  Similarly to the -faltivec option, there's a
new -fzvector option to enable the extensions (as well as an -mzvector
alias for compatibility with GCC).  There's also a separate LangOpt.

The extension as implemented here is intended to be compatible with
the -mzvector extension recently implemented by GCC.

Based on a patch by Richard Sandiford.

Differential Revision: http://reviews.llvm.org/D11001

llvm-svn: 243642

llvm-svn: 243641

Update the debug info in the check-lines because the change in r243638
introduced a constant initialization before the prologue's end as part
of a register spill.

llvm-svn: 243640

llvm-svn: 243639

Summary:
This hidden option would disable code generation through FastISel by
default. It was removed from the available options and from the
Fast-ISel tests that required it in order to run the tests.

Reviewers: dsanders

Subscribers: qcolombet, llvm-commits

Differential Revision: http://reviews.llvm.org/D11610

llvm-svn: 243638

Differential revision: http://reviews.llvm.org/D11595

llvm-svn: 243637

Summary:
Previously, we would sign-extend non-boolean negative constants and
zero-extend otherwise. This was problematic for PHI instructions with
negative values that had a type with bitwidth less than that of the
register used for materialization.

More specifically, ComputePHILiveOutRegInfo() assumes the constants
present in a PHI node are zero extended in their container and
afterwards deduces the known bits.

For example, previously we would materialize an i16 -4 with the
following instruction:

  addiu $r, $zero, -4

The register would end-up with the 32-bit 2's complement representation
of -4. However, ComputePHILiveOutRegInfo() would generate a constant
with the upper 16-bits set to zero. The SelectionDAG builder would use
that information to generate an AssertZero node that would remove any
subsequent trunc & zero_extend nodes.

In theory, we should modify ComputePHILiveOutRegInfo() to consult
target-specific hooks about the way they prefer to materialize the
given constants. However, git-blame reports that this specific code
has not been touched since 2011 and it seems to be working well for every
target so far.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11592

llvm-svn: 243636

OpenMP 4.1 introduces optional argument '(n)' for 'ordered' clause, where 'n' is a number of loops that immediately follow the directive.
'n' must be constant positive integer expressions and it must be less or equal than the number of the loops in the resulting loop nest.
Patch adds parsing and semantic analysis for this optional argument.

llvm-svn: 243635

Summary:
Mips doesn't implement unw_getcontext() or libunwind::Registers_*::jumpto() yet
so we must disable libunwind for this release.

Reviewers: hans

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11563

llvm-svn: 243633

This contains the test-case for r243630.

Patch by: marina.yatsina@intel.com
Differential Revision: http://reviews.llvm.org/D11513

llvm-svn: 243632

Patch by: marina.yatsina@intel.com
Differential Revision: http://reviews.llvm.org/D11512

llvm-svn: 243630

llvm-svn: 243628

This is used by the AMD x86 OpenCL implementation
to change some ABI details on Windows and Linux.

llvm-svn: 243627

llvm-svn: 243626

llvm-svn: 243625

I think I was isolating the failure in the last RUN: line during
development, and forgot to re-enable the others.

llvm-svn: 243624

llvm-svn: 243623

Patch by Nitesh Jain

Reviewers: clayborg, ovyalov.
Subscribers: jaydeep, bhushan, mohit.bhakkad, sagar, emaste, lldb-commits.
Differential Revision: http://reviews.llvm.org/D11562

llvm-svn: 243622

llvm-svn: 243621

Patch by Nitesh Jain

Reviewers: clayborg, ovyalov.
Subscribers: jaydeep, bhushan, mohit.bhakkad, sagar, emaste, lldb-commits.
Differential Revision: http://reviews.llvm.org/D11176

llvm-svn: 243620

Summary:
Currently if the "first child" of the pointer is a char type then the pointer is displayed as a string. This test succeeds incorrectly when the pointer is to a structured type with a char type as its first field. Fix this by switching the test to retrieve the pointee type and checking that it is a char type.


Reviewers: abidh, ChuckR, ki.stfu

Subscribers: greggm, lldb-commits

Differential Revision: http://reviews.llvm.org/D11488

llvm-svn: 243619

    SUMMARY:
    The patch creates Unix Signals based on target architecture. For MIPS it creates MipsLinuxSignals.
    
    Reviewers: clayborg
    Subscribers: mohit.bhakkad, sagar, lldb-commits
    Differential Revision: http://reviews.llvm.org/D11455

llvm-svn: 243618

The reason I was passing this vector by value in the constructor so that
I wouldn't have to copy when initializing the corresponding member but
then I forgot the std::move.

The use-case is LoopDistribution which filters the checks then
std::moves it to LoopVersioning's constructor.  With this interface we
can avoid any copies.

llvm-svn: 243616

llvm-svn: 243615

llvm-svn: 243614

Before, we were passing the pointer partitions to LAA.  Now, we get all
the checks from LAA and filter out the checks within partitions in
LoopDistribution.

This effectively concludes the steps to move filtering memchecks from
LAA into its clients.  There is still some cleanup left to remove the
unused interfaces in LAA that still take PtrPartition.

(Moving this functionality to LoopDistribution also requires
needsChecking on pointers to be made public.)

llvm-svn: 243613

[modules] Remove redundant information written into DeclContext name lookup tables. We don't need to store the data length twice.

llvm-svn: 243612

llvm-svn: 243611