Commits · 84aa58cbe21696e2bbe56d50f045f44a7799171a · Lorenzo Albano / LLVM bpEVL · GitLab

Apr 08, 2020
- CodeGen: Use Register in TargetLowering · 84aa58cb
  Matt Arsenault authored Apr 08, 2020
  
  84aa58cb
- [TimePasses] Small fix in "-time-passes" flag that makes it more stable · 0125db9a
  Kirill Naumov authored Mar 27, 2020
  0125db9a
- [PowerPC][AIX] Enable passing byval formal arguments in multiple registers. · 8abfd2c3
  Sean Fertile authored Mar 24, 2020
  8abfd2c3
- [DSE.MSSA] Only use callCapturesBefore for calls. · bbbec716
  Florian Hahn authored Apr 08, 2020
  bbbec716
- [DSE,MSSA] Hoist getMemoryAccess call (NFC). · a6353fdf
  Florian Hahn authored Apr 08, 2020
  
  a6353fdf
- [DWARFLinker][dsymutil] followup for 88c2137b · 0ed2170d
  Alexey Lapshin authored Apr 08, 2020
  0ed2170d
- [PowerPC][Future] Add Support For Functions That Do Not Use A TOC. · 6c4b40de
  Stefan Pintilie authored Apr 08, 2020
  6c4b40de
- [InstCombine] exclude bitcast of ppc_fp128 in icmp signbit fold · a1c05fe2
  Sanjay Patel authored Apr 08, 2020
  a1c05fe2
- [X86][SSE] Combine PTEST(AND(X,Y),AND(X,Y)) -> PTEST(X,Y) and ANDN equivalents · 66c18c72
  Simon Pilgrim authored Apr 08, 2020
  66c18c72
- [DebugInfo][NFC] Early-exit when analyzing for single-location variables · c77887e4
  Jeremy Morse authored Apr 08, 2020
  c77887e4
- [X86][MC] Support enhanced relaxation for branch align · 916044d8
  Shengchen Kan authored Apr 07, 2020
  916044d8
- [IfConversion] Disallow TrueBB == FalseBB for valid diamonds · 893df203
  Mikael Holmen authored Apr 08, 2020
  893df203
- [ARM][MVE] Optimise offset addresses of gathers/scatters · 89e1248d
  Anna Welker authored Apr 08, 2020
  89e1248d
- [LoopLoadElim] Add test showing that LoopLoadElim doesn't work correctly with new PM · 7adb9e06
  Max Kazantsev authored Apr 08, 2020
  
  7adb9e06
- [GlobalISel] support narrow G_IMPLICIT_DEF for DstSize % NarrowSize != 0 · 35950fea
  Dominik Montada authored Mar 23, 2020
  35950fea
- [VE] Simplify definitions of uimm6 and simm7 · aa034867
  Kazushi (Jam) Marukawa authored Apr 08, 2020
  aa034867
- [DebugInfo] Fix reading DWARFv5 type units in DWP. · af11c556
  Igor Kudrin authored Apr 06, 2020
  af11c556
- [AMDGPU] Expand vector trunc stores from i16 to i8 · f96810ff
  Stanislav Mekhanoshin authored Apr 07, 2020
  f96810ff
- [OpenMP] Add match_{all,any,none} declare variant selector extensions. · a19eb1de
  Johannes Doerfert authored Apr 03, 2020
  a19eb1de
- [JumpThreading] NFC: Simplify ComputeValueKnownInPredecessorsImpl · 91eb442f
  Kazu Hirata authored Apr 07, 2020
  91eb442f
- [NFC] Clean up uses of LoadInst constructor. · 565b56a7
  Eli Friedman authored Apr 07, 2020
  
  565b56a7
- Add MIR-level debugify with only locations support for now · 1adeeabb
  Daniel Sanders authored Apr 03, 2020
  1adeeabb
- [VE] Migrate to the getMachineMemOperand overload using llvm::Align · 624654fd
  Fangrui Song authored Apr 07, 2020
  624654fd
- CodeGen: More conversions to use Register · 6011627f
  Matt Arsenault authored Apr 07, 2020
  
  6011627f
- [ThinLTO] Drop dso_local if a GlobalVariable satisfies isDeclarationForLinker() · d2ef8c1f
  Fangrui Song authored Feb 15, 2020
  d2ef8c1f
- [VE] Adapt aa26dd98 and 2481f26a · 2f8fb4d1
  Fangrui Song authored Apr 07, 2020
  
  2f8fb4d1
Apr 07, 2020
- Recommit [SampleFDO] Add flag for partial profile. · b49eac71
  Wei Mi authored Apr 03, 2020
  b49eac71
- [AMDGPU] Implement copyPhysReg for 16 bit subregs · 96e51ed0
  Stanislav Mekhanoshin authored Feb 28, 2020
  96e51ed0
- CodeGen: Use Register in TargetFrameLowering · 2481f26a
  Matt Arsenault authored Apr 07, 2020
  
  2481f26a
- [BPI] Clear handles when releasing memory (NFC) · fe8abbf4
  Nikita Popov authored Apr 07, 2020
  fe8abbf4
- CodeGen: Use Register in more places · aa26dd98
  Matt Arsenault authored Apr 07, 2020
  
  aa26dd98
- Revert "[SampleFDO] Add flag for partial profile." show-prof-info.test breaks on some platforms. · c5da949a
  Wei Mi authored Apr 07, 2020
  c5da949a
- [SampleFDO] Add flag for partial profile. · e3ba652a
  Wei Mi authored Apr 03, 2020
  e3ba652a
- [NFC][PowerPC] Fix register class for patterns using XXPERMDIs · ecd84354
  Nemanja Ivanovic authored Apr 07, 2020
  ecd84354
- [AMDGPU] Extend constant folding for logical operations · a19a56f6
  Graham Sellers authored Apr 07, 2020
  a19a56f6
- [SelectionDAG] Make getZeroExtendInReg take a vector VT if the operand VT is a vector. · c41685b1
  Craig Topper authored Apr 07, 2020
  c41685b1
- [DWARFLinker][dsymutil][NFC] Move DwarfStreamer into DWARFLinker. · 88c2137b
  Alexey Lapshin authored Apr 07, 2020
  88c2137b
- [AArch64] Don't expand memcmp in strict align mode. · e9ac757f
  Eli Friedman authored Apr 06, 2020
  e9ac757f
- AMDGPU: Use early return · f596ab40
  Matt Arsenault authored Apr 07, 2020
  
  f596ab40
- [WebAssembly][MC] Fix leak of std::string members in MCSymbolWasm · 5be42f36
  Sam Clegg authored Apr 06, 2020
  5be42f36