ARM Exception Index Table sections .ARM.exidx have an implicit dependency
on code sections via SHF_LINK_ORDER. When code sections are folded by ICF
we must mark the unique .ARM.exidx table that describes it as not live
to prevent an illegal entry in the exception table.
    
Note that we do not try and follow the relocations from the .ARM.exidx
section to the .ARM.extab sections to mark these as not live. Leaving
these sections is not a correctness problem. In theory these could be
removed via an application of garbage collection.
    
Fixes https://bugs.llvm.org/show_bug.cgi?id=32614

Differential Revision: https://reviews.llvm.org/D31932

llvm-svn: 300182

RELRO is a feature to make segments read-only after dynamic relocations
are applied. It is different from read-only segments because RELRO is
initially writable. And of course RELRO is different from writable
segments.

RELRO is not a very well known feature. We have a series of checks to
make a decision whether a section should be in a RELRO segment or not,
but we didn't describe why. This patch adds comments to explain how
that decision is made.

llvm-svn: 300176

This patch uses DefaultSoName in getSoName instead of in parseSoName.
I think this is more readable. This patch also add comments.

llvm-svn: 300147

llvm-svn: 300141

Previously, we allowed only integers in this context. Now you can
write expressions there. LLD is now able to handle the following
linker, for example.

  MEMORY { rom (rx) : ORIGIN = (1024 * 1024) }

llvm-svn: 300131

We do not check for similarities when handling unknown tokens in
linker scripts, so "ORIGI" and "LENTH" are not good tokens as a test
for unknown tokens, as I was tempted to "fix" them.

llvm-svn: 300130

llvm-svn: 300129

llvm-svn: 300128

llvm-svn: 300120

Summary:
lld-link allows the number of parallel ThinLTO jobs to be specified
using /opt:lldltojobs=N. If left unspecified, the implementation
conservatively defaults to 1. This leads to very long link times. This
change makes it so that the default is to automatically set the
parallelism, as we do in the ELF linker.

Reviewers: ruiu, hans

Reviewed By: ruiu, hans

Subscribers: pcc, mehdi_amini, Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D31986

llvm-svn: 300089

Filenames are case-insensitive on Windows, so when we dispatch based
on argv0, we need to handle it case-insensitively.

Fixes https://bugs.llvm.org/show_bug.cgi?id=32637.

llvm-svn: 300087

Fixes PR32572.

When
    (a) a library has no soname
and (b) library is given on the command line with path (and not through -L/-l flags)
DT_NEEDED entry for such library keeps the path as given.

This behavior is consistent with gold and bfd, and is used in compiler-rt test suite.

This is a second attempt after r300007 got reverted. This time relro-omagic test is
changed in a way to avoid hardcoding the path to the test directory in the objdump'd
binary.

llvm-svn: 300011

This reverts commit r300007. Reason: breaks all the bots.

llvm-svn: 300008

Fixes PR32572.

When
    (a) a library has no soname
and (b) library is given on the command line with path (and not through -L/-l flags)
DT_NEEDED entry for such library keeps the path as given.

This behavior is consistent with gold and bfd, and is used in compiler-rt test suite.

llvm-svn: 300007

llvm-svn: 300005

llvm-svn: 300004

Fixes PR32573.

--export-dynamic exports everything, even in the presence of a --dynamic-list,
or --export-dynamic-symbol.

llvm-svn: 300002

Summary:
This lets PDB readers lookup type record data by type index in O(log n)
time. It also enables makes `cvdump -t` work on PDBs produced by LLD.
cvdump will not dump a PDB that doesn't have an index-to-offset table.

The table is sorted by type index, and has an entry every 8KB. Looking
up a type record by index is a binary search of this table, followed by
a scan of at most 8KB.

Reviewers: ruiu, zturner, inglorion

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31636

llvm-svn: 299958

Previously we silently produced broken output for R_386_GOT32X/R_386_GOT32 
relocations if they were used to compute the address of the symbol’s global
offset table entry without base register when position-independent code is disabled.

Situation happened because of recent ABI changes. Released ABI mentions that
R_386_GOT32X can be calculated in a two different ways (so we did not follow ABI here 
before this patch), but draft ABI also mentions R_386_GOT32 relocation here. 
We should use the same calculations for both relocations.

Problem is that we always calculated them as G + A - GOT (offset from end of GOT),
but for case when PIC is disabled, according to i386 ABI calculation should be G + A,
what should produce just an address in GOT finally.

ABI: https://github.com/hjl-tools/x86-psABI/wiki/intel386-psABI-draft.pdf (p36, p60).
llvm-svn: 299812

llvm-svn: 299795

Update the expected output to match the current llvm-pdbdump raw output.

llvm-svn: 299793

Thanks to Rui for noticing it.

llvm-svn: 299777

[ELF] Do not pass GOT section as an argument to handleARMTlsRelocation and handleMipsTlsRelocation functions. NFC

Both functions always use the same GOT sections In<ELFT>::Got and
In<ELFT>::MipsGot respectively, so we do not need to pass them as an
argument.

llvm-svn: 299773

This follows r299748 which fixed a latent bug the original commit exposed.

llvm-svn: 299755

    
When the target of the TlsOffsetRel is non-preemptible we can write the
offset directly into the GOT without needing a dynamic relocation. This
is optional for dynamically linked executables but is required for static
linking.
    
This change adds the relocation to the GOT entry and a test case for
non-0 offsets so that if we miss out the offset the test won't spuriously
pass by virtue of the default value being 0.

Differential Revision: https://reviews.llvm.org/D31749

llvm-svn: 299751

    
The handleNoRelaxTlsRelocation handled both ARM and Mips as at a
high-level the actions of what to do when encountering a local dynamic or
global dynamic TLS relocation are the same. However due to Mips using a
custom GOT the differences of the implementation are enough that the
function became difficult to understand.
    
This change replaces handleNotRelaxTlsRelocation into
handleARMTlsRelocation() and handleMipsTlsRelocation() so that the ARM and
Mips specific code is isolated.

Differential Revision: https://reviews.llvm.org/D31748

llvm-svn: 299750

lld-x86_64-darwin13.

llvm-svn: 299749

r299635 exposed a latent bug in the Linux implementation of parallel_for, which
resulted in it calling the function outside of the range requested, resulting
later in a segmentation fault. This change fixes this issue and adds a unit test.

llvm-svn: 299748

The argument was always casted, so cast it in the caller.

llvm-svn: 299742

llvm-svn: 299740

The /appcontainer flag indicates that the module may only be used inside
an application container (for isolation).  This has been supported by
link.exe since Windows 8.0.  It sets an additional bit in the PE DLL
Characteristics flag to indicate the behavioural change.

llvm-svn: 299728

This patch addresses a post-commit review comment for r299615.

Differential Revision: https://reviews.llvm.org/D31792

llvm-svn: 299722

The alignment expression cannot depend on '.', so we can compute it
early.

llvm-svn: 299717

This removes a bit more work from assignAddresses.

llvm-svn: 299716

llvm-svn: 299713

This avoids calling it multiple times. In particular, we don't have to
call in in assignAddresses any more.

llvm-svn: 299709

llvm-svn: 299655

llvm-svn: 299636

Executable sections should not be padded with zero by default. On some
architectures, 0x00 is the start of a valid instruction sequence, so can confuse
disassembly between InputSections (and indeed the start of the next InputSection
in some situations). Further, in the case of misjumps into padding, padding may
start to be executed silently.

On x86, the "0xcc" byte represents the int3 trap instruction. It is a single
byte long so can serve well as padding. This change switches x86 (and x86_64) to
use this value for padding in executable sections, if no linker script directive
overrides it. It also puts the behaviour into place making it easy to change the
behaviour of other targets when desired. I do not know the relevant instruction
sequences for trap instructions on other targets however, so somebody should add
this separately.

Because the old behaviour simply wrote padding in the whole section before
overwriting most of it, this change also modifies the padding algorithm to write
padding only where needed. This in turn has caused a small behaviour change with
regards to what values are written via Fill commands in linker scripts, bringing
it into line with ld.bfd. The fill value is now written starting from the end of
the previous block, which means that it always starts from the first byte of the
fill, whereas the old behaviour meant that the padding sometimes started mid-way
through the fill value. See the test changes for more details.

Reviewed by: ruiu

Differential Revision: https://reviews.llvm.org/D30886

Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32227
llvm-svn: 299635

scanRelocs() does a lot of things. It fills InputSection's Relocations vector,
making a decision whether a TLS relocation should be relaxed or not,
and making a decision whether a GOT/PLT slot needs to be created or not.

They don't actually have to be done in a single loop. I want to separate
them so that some of them can be run concurently. As a first step, this
patch moves PLT/GOT slot assignment to beginning of the loop, so that
they just fall through to the next statements. This should make it clear
that that code doesn't affect other parts of the loop.

llvm-svn: 299615