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  1. Apr 13, 2017
    • Peter Smith's avatar
      [ELF] Mark ARM Exceptions that refer to folded code as not live · cec1e260
      Peter Smith authored
          
      ARM Exception Index Table sections .ARM.exidx have an implicit dependency
      on code sections via SHF_LINK_ORDER. When code sections are folded by ICF
      we must mark the unique .ARM.exidx table that describes it as not live
      to prevent an illegal entry in the exception table.
          
      Note that we do not try and follow the relocations from the .ARM.exidx
      section to the .ARM.extab sections to mark these as not live. Leaving
      these sections is not a correctness problem. In theory these could be
      removed via an application of garbage collection.
          
      Fixes https://bugs.llvm.org/show_bug.cgi?id=32614
      
      Differential Revision: https://reviews.llvm.org/D31932
      
      llvm-svn: 300182
      cec1e260
    • Rui Ueyama's avatar
      Add comments for the RELRO segment. · 9d773f3c
      Rui Ueyama authored
      RELRO is a feature to make segments read-only after dynamic relocations
      are applied. It is different from read-only segments because RELRO is
      initially writable. And of course RELRO is different from writable
      segments.
      
      RELRO is not a very well known feature. We have a series of checks to
      make a decision whether a section should be in a RELRO segment or not,
      but we didn't describe why. This patch adds comments to explain how
      that decision is made.
      
      llvm-svn: 300176
      9d773f3c
    • Rui Ueyama's avatar
      Do not initialize this->SoName with this->DefaultSoName. · 3233d3eb
      Rui Ueyama authored
      This patch uses DefaultSoName in getSoName instead of in parseSoName.
      I think this is more readable. This patch also add comments.
      
      llvm-svn: 300147
      3233d3eb
    • Rui Ueyama's avatar
      Allow expressions in MEMORY command. · 040af7de
      Rui Ueyama authored
      Previously, we allowed only integers in this context. Now you can
      write expressions there. LLD is now able to handle the following
      linker, for example.
      
        MEMORY { rom (rx) : ORIGIN = (1024 * 1024) }
      
      llvm-svn: 300131
      040af7de
  2. Apr 12, 2017
  3. Apr 08, 2017
    • George Rimar's avatar
      [ELF] - Stop producing broken output for R_386_GOT32[X] relocations. · e7bf9688
      George Rimar authored
      Previously we silently produced broken output for R_386_GOT32X/R_386_GOT32 
      relocations if they were used to compute the address of the symbol’s global
      offset table entry without base register when position-independent code is disabled.
      
      Situation happened because of recent ABI changes. Released ABI mentions that
      R_386_GOT32X can be calculated in a two different ways (so we did not follow ABI here 
      before this patch), but draft ABI also mentions R_386_GOT32 relocation here. 
      We should use the same calculations for both relocations.
      
      Problem is that we always calculated them as G + A - GOT (offset from end of GOT),
      but for case when PIC is disabled, according to i386 ABI calculation should be G + A,
      what should produce just an address in GOT finally.
      
      ABI: https://github.com/hjl-tools/x86-psABI/wiki/intel386-psABI-draft.pdf (p36, p60).
      llvm-svn: 299812
      e7bf9688
  4. Apr 07, 2017
  5. Apr 06, 2017
    • Rafael Espindola's avatar
      Call updateAlignment before assignAddresses. · d1960dc0
      Rafael Espindola authored
      The alignment expression cannot depend on '.', so we can compute it
      early.
      
      llvm-svn: 299717
      d1960dc0
    • Rafael Espindola's avatar
      Move call to findMemoryRegion before assignAddresses. · feed7506
      Rafael Espindola authored
      This removes a bit more work from assignAddresses.
      
      llvm-svn: 299716
      feed7506
    • Rafael Espindola's avatar
      Remove redundant argument. NFC. · 1902b337
      Rafael Espindola authored
      llvm-svn: 299713
      1902b337
    • Rafael Espindola's avatar
      Cache the result of findSection. · 9b980095
      Rafael Espindola authored
      This avoids calling it multiple times. In particular, we don't have to
      call in in assignAddresses any more.
      
      llvm-svn: 299709
      9b980095
    • James Henderson's avatar
      Revert r299635 because it exposed a latent bug. · d9831807
      James Henderson authored
      llvm-svn: 299655
      d9831807
    • James Henderson's avatar
      [ELF] Remove unnecessary cast and fix comments. NFC. · 7ee22756
      James Henderson authored
      llvm-svn: 299636
      7ee22756
    • James Henderson's avatar
      [ELF] Pad x86 executable sections with 0xcc int3 instructions · 8dd4c06a
      James Henderson authored
      Executable sections should not be padded with zero by default. On some
      architectures, 0x00 is the start of a valid instruction sequence, so can confuse
      disassembly between InputSections (and indeed the start of the next InputSection
      in some situations). Further, in the case of misjumps into padding, padding may
      start to be executed silently.
      
      On x86, the "0xcc" byte represents the int3 trap instruction. It is a single
      byte long so can serve well as padding. This change switches x86 (and x86_64) to
      use this value for padding in executable sections, if no linker script directive
      overrides it. It also puts the behaviour into place making it easy to change the
      behaviour of other targets when desired. I do not know the relevant instruction
      sequences for trap instructions on other targets however, so somebody should add
      this separately.
      
      Because the old behaviour simply wrote padding in the whole section before
      overwriting most of it, this change also modifies the padding algorithm to write
      padding only where needed. This in turn has caused a small behaviour change with
      regards to what values are written via Fill commands in linker scripts, bringing
      it into line with ld.bfd. The fill value is now written starting from the end of
      the previous block, which means that it always starts from the first byte of the
      fill, whereas the old behaviour meant that the padding sometimes started mid-way
      through the fill value. See the test changes for more details.
      
      Reviewed by: ruiu
      
      Differential Revision: https://reviews.llvm.org/D30886
      
      Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32227
      llvm-svn: 299635
      8dd4c06a
    • Rui Ueyama's avatar
      Create GOT and PLT entries early in scanRelocs(). · 5036cc67
      Rui Ueyama authored
      scanRelocs() does a lot of things. It fills InputSection's Relocations vector,
      making a decision whether a TLS relocation should be relaxed or not,
      and making a decision whether a GOT/PLT slot needs to be created or not.
      
      They don't actually have to be done in a single loop. I want to separate
      them so that some of them can be run concurently. As a first step, this
      patch moves PLT/GOT slot assignment to beginning of the loop, so that
      they just fall through to the next statements. This should make it clear
      that that code doesn't affect other parts of the loop.
      
      llvm-svn: 299615
      5036cc67
    • Rui Ueyama's avatar
      Remove Target::isTlsGlobalDynamicRel() · c2a49bf9
      Rui Ueyama authored
      Relocations are abstracted as platform-independent R_TLS_* relocations,
      so we don't need to check platform-specific ones to see if a relocation
      is TLS GD.
      
      llvm-svn: 299614
      c2a49bf9
    • Rui Ueyama's avatar
  6. Apr 05, 2017
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