Commits · 8b59c26bf347be5d96487c89849c0c1108bb3c42 · Lorenzo Albano / LLVM bpEVL · GitLab

Jun 26, 2020
- Extend or truncate __ptr32/__ptr64 pointers when dereferenced. · 8b59c26b
  Amy Huang authored May 11, 2020
  8b59c26b
- [InstCombine] Drop debug loc in TryToSinkInstruction · 903cf140
  Vedant Kumar authored Jun 24, 2020
  903cf140
- Revert "[sve][acle] Add reinterpret intrinsics for brain float." · ff5ccf25
  Francesco Petrogalli authored Jun 26, 2020
  ff5ccf25
- [SVE] Code generation for fixed length vector adds. · 3a98d5d7
  Paul Walker authored Jun 20, 2020
  3a98d5d7
- [CostModel] Avoid traditional ConstantExpr crashy pitfails · 64258773
  Roman Lebedev authored Jun 26, 2020
  64258773
- AMDGPU: Add llvm.amdgcn.sqrt intrinsic · 9e03bdeb
  Matt Arsenault authored Jun 24, 2020
  9e03bdeb
- [AArch64] add vector test for merged condition branching; NFC · 67043ed8
  Sanjay Patel authored Jun 25, 2020
  
  67043ed8
- [PowerPC] Add support for llvm.ppc.dcbt, llvm.ppc.dcbtst, llvm.ppc.isync intrinsics · fa0da7ec
  Amy Kwan authored Jun 26, 2020
  fa0da7ec
- [PGO] Add a functionality to always instrument the func entry BB · b4bceb94
  Rong Xu authored Jun 26, 2020
  b4bceb94
- Migrate last batch of tests to gc-live bundle format · 2e17bba3
  Philip Reames authored Jun 25, 2020
  2e17bba3
- [NewPM][LoopUnroll] Rename unroll* to loop-unroll* · a95796a3
  Arthur Eubanks authored Jun 26, 2020
  a95796a3
- [sve][acle] Add reinterpret intrinsics for brain float. · a15722c5
  Francesco Petrogalli authored Jun 24, 2020
  a15722c5
- AMDGPU/GlobalISel: Fix legacy clover kernel argument ABI · 431daede
  Matt Arsenault authored Jun 26, 2020
  431daede
- AMDGPU/GlobalISel: Add baseline checks for legacy clover kernel ABI · 54573528
  Matt Arsenault authored Jun 26, 2020
  54573528
- AMDGPU/GlobalISel: Uncomment some fixed tests · b1cfa64c
  Matt Arsenault authored Jun 26, 2020
  
  b1cfa64c
- [MSP430] Update register names · cb56fa21
  Anatoly Trosinenko authored Jun 26, 2020
  cb56fa21
- [DWARFYAML][debug_info] Teach yaml2obj emit correct DWARF64 unit header. · 7686b295
  Xing GUO authored Jun 26, 2020
  7686b295
- [AArch64][SVE] Add bfloat16 support to store intrinsics · edcfef8f
  Kerry McLaughlin authored Jun 26, 2020
  edcfef8f
- [AArch64][SVE] Predicate bfloat16 load patterns with HasBF16 · 0ccfe1b2
  Kerry McLaughlin authored Jun 26, 2020
  0ccfe1b2
- [AArch64][SVE] Guard perm and select bfloat16 intrinsic patterns · c65d4eb5
  Cullen Rhodes authored Jun 24, 2020
  c65d4eb5
- [ARM] VCVTT fpround instruction selection · d428f881
  David Green authored Jun 26, 2020
  d428f881
- [ARM] VCVTT instruction selection · 76e0e1a5
  David Green authored Jun 26, 2020
  76e0e1a5
- [SVE] Fix scalable vector bug in DataLayout::getIntPtrType · 7a834a0a
  David Sherwood authored Jun 22, 2020
  7a834a0a
- [SelectionDAG] Lower @llvm.get.active.lane.mask to setcc · 243a5329
  Sjoerd Meijer authored Jun 26, 2020
  243a5329
- [ARM] Don't revert get.active.lane.mask in ARM Tail-Predication pass · 1319d9bb
  Sjoerd Meijer authored Jun 22, 2020
  1319d9bb
- [DebugInfo] Fix emitting offsets to CUs with -dwarf-sections-as-references=Enable. · 70165bb7
  Igor Kudrin authored Jun 22, 2020
  70165bb7
- [PowerPC][Power10] Implement centrifuge, vector gather every nth bit, vector... · e0c02dc9
  Amy Kwan authored Jun 25, 2020
  e0c02dc9
- [NewPM][BasicAA] Rename basicaa -> basic-aa, add alias · 0c6bf90b
  Arthur Eubanks authored Jun 24, 2020
  0c6bf90b
- [InferAddressSpaces] Handle the pair of `ptrtoint`/`inttoptr`. · dccfaacf
  Michael Liao authored Jun 16, 2020
  dccfaacf
- [AArch64][GlobalISel] Fix extended shift addressing mode selection not handling sxth. · 97a34b5f
  Amara Emerson authored Jun 25, 2020
  97a34b5f
- [WebAssembly] Adding 64-bit versions of __stack_pointer and other globals · b9a539c0
  Wouter van Oortmerssen authored Jun 15, 2020
  b9a539c0
Jun 25, 2020
- [AArch64][GlobalISel] Port buildvector -> dup pattern from AArch64ISelLowering · 7fb84dff
  Jessica Paquette authored Jun 16, 2020
  7fb84dff
- Migrate a couple of codegen tests to gc-live format · 5d65529e
  Philip Reames authored Jun 25, 2020
  
  5d65529e
- [ARM] Split FPExt loads · d79b57b8
  David Green authored Jun 25, 2020
  d79b57b8
- [x86] add vector test for merged condition branching; NFC · 72312958
  Sanjay Patel authored Jun 25, 2020
  
  72312958
- Migrate a couple of codegen tests to gc-live format · b5769a77
  Philip Reames authored Jun 25, 2020
  
  b5769a77
- [ARM] MVE VCVT lowering for f16->f32 extends · 8532b2ee
  David Green authored Jun 25, 2020
  8532b2ee
- [X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the... · 6673d692
  Craig Topper authored Jun 25, 2020
  6673d692
- Revert "[X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw... · 01c18f91
  Craig Topper authored Jun 25, 2020
  01c18f91
- [ARM] Add FP_ROUND handling to splitting MVE stores · 0bfb4c25
  David Green authored Jun 25, 2020
  0bfb4c25