Commits · 9003b3b76d57c15ee8c451f0c2292977916dcb88 · Lorenzo Albano / LLVM bpEVL · GitLab

Mar 08, 2018
- [CMake] Add missing test dependency · 9003b3b7
  David Zarzycki authored Mar 08, 2018
  9003b3b7
- [llvm-mca] LLVM Machine Code Analyzer. · 3a6b0920
  Andrea Di Biagio authored Mar 08, 2018
  3a6b0920
- [dsymutil] Embed toolchain in dSYM bundle · 2902a21e
  Jonas Devlieghere authored Mar 08, 2018
  2902a21e
- [X86] Change X86::PMULDQ/PMULUDQ opcodes to take vXi64 type as input instead of vXi32. · a406796f
  Craig Topper authored Mar 08, 2018
  a406796f
- Revert "[LTO] Support filtering by hotness threshold" · fb2d3422
  Bob Haarman authored Mar 08, 2018
  fb2d3422
- Reland "[DebugInfo] Support DWARF expressions in eh_frame" · 86fb7bf2
  Rafael Auler authored Mar 08, 2018
  86fb7bf2
- [X86] Fix some isel patterns that used aligned vector load instructions with unaligned predicates. · 7ff97797
  Craig Topper authored Mar 08, 2018
  7ff97797
Mar 07, 2018
- [AArch64] Adjust the cost of integer vector division · f9bd871d
  Evandro Menezes authored Mar 07, 2018
  f9bd871d
- Revert r326932: [DebugInfo] Support DWARF expressions in eh_frame · 6aa8b349
  Rui Ueyama authored Mar 07, 2018
  6aa8b349
- [AArch64] add missing pattern for insert_subvector undef · 33bdb3e0
  Sebastian Pop authored Mar 07, 2018
  33bdb3e0
- Revert "[llvm-objcopy] Add support for large indexes" · 8b831c1d
  Jake Ehrlich authored Mar 07, 2018
  8b831c1d
- [llvm-objcopy] Add support for large indexes · 0a151bd6
  Jake Ehrlich authored Mar 07, 2018
  0a151bd6
- [DebugInfo] Support DWARF expressions in eh_frame · 7fdf4444
  Rafael Auler authored Mar 07, 2018
  7fdf4444
- [X86][SSE] Regenerate float maxnum/minnum tests · dc1a0385
  Simon Pilgrim authored Mar 07, 2018
  dc1a0385
- [Pipeliner] Fixed node order issue related to zero latency edges · 4b8bcf00
  Roorda, Jan-Willem authored Mar 07, 2018
  4b8bcf00
- [PowerPC] Move test to correct location. · f8c2dce2
  Stefan Pintilie authored Mar 07, 2018
  f8c2dce2
- [X86] Make the MUL->VPMADDWD work before op legalization on AVX1 targets.... · c3c15dd6
  Craig Topper authored Mar 07, 2018
  c3c15dd6
- [Hexagon] Rewrite non-HVX unaligned loads as pairs of aligned ones · 2c3edf05
  Krzysztof Parzyszek authored Mar 07, 2018
  2c3edf05
- [AMDGPU] Increased vector length for global/constant loads. · 89196642
  Farhana Aleen authored Mar 07, 2018
  89196642
- Re-land: Teach CorrelatedValuePropagation to reduce the width of udiv/urem instructions. · eccfbf1b
  Justin Lebar authored Mar 07, 2018
  eccfbf1b
- Revert "[AMDGPU] Widened vector length for global/constant address space." · 347d12b4
  Farhana Aleen authored Mar 07, 2018
  347d12b4
- [PowerPC] LSR tunings for PowerPC · f8438e8e
  Stefan Pintilie authored Mar 07, 2018
  f8438e8e
- [AMDGPU] Widened vector length for global/constant address space. · 0d03d058
  Farhana Aleen authored Mar 07, 2018
  0d03d058
- [dwarfdump] Only print CU relative offset in verbose mode · bf8596f9
  Jonas Devlieghere authored Mar 07, 2018
  bf8596f9
- Revert "Reapply "[DWARFv5] Emit file 0 to the line table."" · e12a48bc
  Alexander Kornienko authored Mar 07, 2018
  e12a48bc
- Revert rL326898: "Teach CorrelatedValuePropagation to reduce the width of udiv/urem instructions." · eeeb0eb0
  Justin Lebar authored Mar 07, 2018
  eeeb0eb0
- Teach CorrelatedValuePropagation to reduce the width of udiv/urem instructions. · cb9e89c3
  Justin Lebar authored Mar 07, 2018
  cb9e89c3
- [X86][X87] Add X87 fp80 conversion tests · eab108ba
  Simon Pilgrim authored Mar 07, 2018
  eab108ba
- [mips] Correct the definition of m(f|t)c(0|2) · 52ae4f07
  Simon Dardis authored Mar 07, 2018
  52ae4f07
- [LoadStoreVectorizer] Differentiate between <1 x T> and T · 19f531d3
  Sven van Haastregt authored Mar 07, 2018
  19f531d3
- [ARM] Fix for PR36577 · af30f06d
  Sjoerd Meijer authored Mar 07, 2018
  af30f06d
- Add early exit on reassociation of 0 expression. · 204ade41
  Evgeny Stupachenko authored Mar 07, 2018
  204ade41
Mar 06, 2018
- Reapply "[DWARFv5] Emit file 0 to the line table." · 4428e90e
  Paul Robinson authored Mar 06, 2018
  4428e90e
- [TargetLowering] Add vector BITCAST support to SimplifyDemandedVectorElts · ca38c762
  Simon Pilgrim authored Mar 06, 2018
  ca38c762
- DA: remove uses of GEP, only ask SCEV · bf6e1c26
  Sebastian Pop authored Mar 06, 2018
  bf6e1c26
- [SymboleFilePDB] Put the test input back that my previous commit clobbered · 091f9eb9
  Aaron Smith authored Mar 06, 2018
  091f9eb9
- [Hexagon] Update more testcases · 18484de3
  Krzysztof Parzyszek authored Mar 06, 2018
  18484de3
- [Hexagon] Remove {{ *}} from testcases · c9f797fd
  Krzysztof Parzyszek authored Mar 06, 2018
  c9f797fd
- [X86] Reject registers that require a REX prefix in inline asm constraints in 32-bit mode · 274e08dd
  Craig Topper authored Mar 06, 2018
  274e08dd
- [AMDGPU] Add default ISA version targets · 0f722254
  Stanislav Mekhanoshin authored Mar 06, 2018
  0f722254