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  1. Sep 15, 2017
    • Jatin Bhateja's avatar
      [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs. · 908c8b37
      Jatin Bhateja authored
      Summary:
         1/  Operand folding during complex pattern matching for LEAs has been
             extended, such that it promotes Scale to accommodate similar operand
             appearing in the DAG.
             e.g.
                T1 = A + B
                T2 = T1 + 10
                T3 = T2 + A
             For above DAG rooted at T3, X86AddressMode will no look like
                Base = B , Index = A , Scale = 2 , Disp = 10
      
         2/  During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
             so that if there is an opportunity then complex LEAs (having 3 operands)
             could be factored out.
             e.g.
                leal 1(%rax,%rcx,1), %rdx
                leal 1(%rax,%rcx,2), %rcx
             will be factored as following
                leal 1(%rax,%rcx,1), %rdx
                leal (%rdx,%rcx)   , %edx
      
         3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
            thus avoiding creation of any complex LEAs within a loop.
      
      Reviewers: lsaba, RKSimon, craig.topper, qcolombet
      
      Reviewed By: lsaba
      
      Subscribers: spatel, igorb, llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D35014
      
      llvm-svn: 313343
      908c8b37
    • Reid Kleckner's avatar
      [codeview] Use a type index of zero for static method "this" types · 87288b98
      Reid Kleckner authored
      Otherwise VS won't show anything in the autos or watch window of static
      methods.
      
      llvm-svn: 313329
      87288b98
  2. Sep 14, 2017
    • Jan Sjodin's avatar
      Add AddresSpace to PseudoSourceValue. · 312ccf76
      Jan Sjodin authored
      Differential Revision: https://reviews.llvm.org/D35089
      
      llvm-svn: 313297
      312ccf76
    • Benjamin Kramer's avatar
      Remove usages of deprecated std::unary_function and std::binary_function. · 591aac7c
      Benjamin Kramer authored
      These are removed in C++17. We still have some users of
      unary_function::argument_type, so just spell that typedef out. No
      functionality change intended.
      
      Note that many of the argument types are actually wrong :)
      
      llvm-svn: 313287
      591aac7c
    • Krzysztof Parzyszek's avatar
      TableGen support for parameterized register class information · 779d98e1
      Krzysztof Parzyszek authored
      This replaces TableGen's type inference to operate on parameterized
      types instead of MVTs, and as a consequence, some interfaces have
      changed:
      - Uses of MVTs are replaced by ValueTypeByHwMode.
      - EEVT::TypeSet is replaced by TypeSetByHwMode.
      
      This affects the way that types and type sets are printed, and the
      tests relying on that have been updated.
      
      There are certain users of the inferred types outside of TableGen
      itself, namely FastISel and GlobalISel. For those users, the way
      that the types are accessed have changed. For typical scenarios,
      these replacements can be used:
      - TreePatternNode::getType(ResNo) -> getSimpleType(ResNo)
      - TreePatternNode::hasTypeSet(ResNo) -> hasConcreteType(ResNo)
      - TypeSet::isConcrete -> TypeSetByHwMode::isValueTypeByHwMode(false)
      
      For more information, please refer to the review page.
      
      Differential Revision: https://reviews.llvm.org/D31951
      
      llvm-svn: 313271
      779d98e1
    • Krzysztof Parzyszek's avatar
      [IfConversion] More simple, correct dead/kill liveness handling · 6ca02b25
      Krzysztof Parzyszek authored
      Patch by Jesper Antonsson.
      
      Differential Revision: https://reviews.llvm.org/D37611
      
      llvm-svn: 313268
      6ca02b25
    • Simon Pilgrim's avatar
      [DAGCombine] (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2) · 8bd2d878
      Simon Pilgrim authored
      We already have a combine for this pattern when the input to shl is add, so we just need to enable the transformation when the input is or.
      
      Original patch by @tstellar
      
      Differential Revision: https://reviews.llvm.org/D19325
      
      llvm-svn: 313251
      8bd2d878
    • Simon Pilgrim's avatar
      [SelectionDAG] ComputeNumSignBits - cleanup ROTL/ROTR wrapping to match DAGCombine etc. · 523483e0
      Simon Pilgrim authored
      Use RotAmt.urem(VTBits) instead of AND(RotAmt, VTBits - 1)
      
      TBH I don't expect non-power-of-2 types to be created, but it makes the logic clearer and matches what we do in other rotation combines.
      
      llvm-svn: 313245
      523483e0
    • Dean Michael Berris's avatar
      [XRay][CodeGen] Use the current function symbol as the associated symbol for... · 01fd7c8b
      Dean Michael Berris authored
      [XRay][CodeGen] Use the current function symbol as the associated symbol for the instrumentation map
      
      Summary:
      XRay had been assuming that the previous section is the "text" section
      of the function when lowering the instrumentation map. Unfortunately
      this is not a safe assumption, because we may be coming from lowering
      debug type information for the function being lowered.
      
      This fixes an issue with combining -gsplit-dwarf, -generate-type-units,
      -debug-compile and -fxray-instrument for sole member functions. When the
      split dwarf section is stripped, we're left with references from the
      xray_instr_map to the debug section. The change now uses the function's
      symbol instead of the previous section's start symbol.
      
      We found the bug while attempting to strip the split debug sections off
      an XRay-instrumented object file, which had a peculiar edge-case for
      single-function classes where the single function is being lowered.
      Because XRay had assocaited the instrumentation map for a function to
      the debug types section instead of the function's section, the objcopy
      call will fail due to the misplaced reference from the xray_instr_map
      section.
      
      Reviewers: pcc, dblaikie, echristo
      
      Subscribers: llvm-commits, aprantl
      
      Differential Revision: https://reviews.llvm.org/D37791
      
      llvm-svn: 313233
      01fd7c8b
    • Reid Kleckner's avatar
      [codeview] Fold FIXME into comment, there's nothing to do. NFC · cd7bba02
      Reid Kleckner authored
      llvm-svn: 313214
      cd7bba02
    • Hans Wennborg's avatar
      Revert r312719 "[MachineCombiner] Update instruction depths incrementally for large BBs." · 06e2a384
      Hans Wennborg authored
      This caused PR34596.
      
      > [MachineCombiner] Update instruction depths incrementally for large BBs.
      >
      > Summary:
      > For large basic blocks with lots of combinable instructions, the
      > MachineTraceMetrics computations in MachineCombiner can dominate the compile
      > time, as computing the trace information is quadratic in the number of
      > instructions in a BB and it's relevant successors/predecessors.
      >
      > In most cases, knowing the instruction depth should be enough to make
      > combination decisions. As we already iterate over all instructions in a basic
      > block, the instruction depth can be computed incrementally. This reduces the
      > cost of machine-combine drastically in cases where lots of instructions
      > are combined. The major drawback is that AFAIK, computing the critical path
      > length cannot be done incrementally. Therefore we only compute
      > instruction depths incrementally, for basic blocks with more
      > instructions than inc_threshold. The -machine-combiner-inc-threshold
      > option can be used to set the threshold and allows for easier
      > experimenting and checking if using incremental updates for all basic
      > blocks has any impact on the performance.
      >
      > Reviewers: sanjoy, Gerolf, MatzeB, efriedma, fhahn
      >
      > Reviewed By: fhahn
      >
      > Subscribers: kiranchandramohan, javed.absar, efriedma, llvm-commits
      >
      > Differential Revision: https://reviews.llvm.org/D36619
      
      llvm-svn: 313213
      06e2a384
    • Stanislav Mekhanoshin's avatar
      Allow target to decide when to cluster loads/stores in misched · 7fe9a5d9
      Stanislav Mekhanoshin authored
      MachineScheduler when clustering loads or stores checks if base
      pointers point to the same memory. This check is done through
      comparison of base registers of two memory instructions. This
      works fine when instructions have separate offset operand. If
      they require a full calculated pointer such instructions can
      never be clustered according to such logic.
      
      Changed shouldClusterMemOps to accept base registers as well and
      let it decide what to do about it.
      
      Differential Revision: https://reviews.llvm.org/D37698
      
      llvm-svn: 313208
      7fe9a5d9
  3. Sep 13, 2017
  4. Sep 12, 2017
  5. Sep 11, 2017
  6. Sep 09, 2017
  7. Sep 08, 2017
  8. Sep 07, 2017
    • Matt Arsenault's avatar
      DAG: Allow creating extract_vector_elt post-legalize · 61ec738b
      Matt Arsenault authored
      Fixes some combine issues for AMDGPU where we weren't
      getting the many extract_vector_elt combines expected
      in a future patch.
      
      This should really be checking isOperationLegalOrCustom on
      the extract. That improves a number of x86 lit tests, but
      a few get stuck in an infinite loop from one place
      where a similar looking extract is created. I have a
      different workaround in the backend for that which
      keeps many of those improvements, but also adds a few
      regressions.
      
      llvm-svn: 312730
      61ec738b
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