Commits · 9bbd653084de43b3d1d80fec157798bc0d557598 · Lorenzo Albano / LLVM bpEVL · GitLab

Apr 19, 2018
- [ORC] Make VSO symbol resolution/finalization operations private. · 9bbd6530
  Lang Hames authored Apr 19, 2018
  9bbd6530
- [llvm-mca][X86] Add resource test for every out-of-order scheduler model · 4a486c13
  Simon Pilgrim authored Apr 19, 2018
  4a486c13
- [X86][SLM] Fix typo using SandyBridge resources. · 4ba057db
  Simon Pilgrim authored Apr 19, 2018
  4ba057db
- [X86] Correct the scheduling data for register forms of XCHG and XADD on Intel CPUs. · b5f26591
  Craig Topper authored Apr 19, 2018
  b5f26591
- [Reassociate] fix formatting; NFC · a201787f
  Sanjay Patel authored Apr 19, 2018
  a201787f
- [X86] Merge some MMX instregex · 5e492d29
  Simon Pilgrim authored Apr 19, 2018
  5e492d29
- [if-converter] Handle BBs that terminate in ret during diamond conversion · fbee8574
  Krzysztof Parzyszek authored Apr 19, 2018
  fbee8574
- [Hexagon] Use legal types when lowering CONCAT_VECTORS via BUILD_VECTOR · 2a9a83cd
  Krzysztof Parzyszek authored Apr 19, 2018
  2a9a83cd
- [llvm-objdump] Remove test object file · dca79d28
  Francis Visoiu Mistrih authored Apr 19, 2018
  dca79d28
- [llvm-objdump] Print "..." instead of random data for virtual sections · 1834682b
  Francis Visoiu Mistrih authored Apr 19, 2018
  1834682b
- [gold/ThinLTO] Invoke llvm_shutdown when exiting after ThinLTO indexing · aa94393e
  Teresa Johnson authored Apr 19, 2018
  aa94393e
- [AMDGPU] Do not only rely on BB number when finding bottom loop · 1bc6e71f
  Mark Searles authored Apr 19, 2018
  1bc6e71f
- [llvm-mca][X86] Add mmx instruction to btver2 resource tests · f209321d
  Simon Pilgrim authored Apr 19, 2018
  f209321d
- [NewGVN] Add ops as dependency if we cannot find a leader for ValueOp. · b789165e
  Florian Hahn authored Apr 19, 2018
  b789165e
- [Hexagon] Generate code for vector bswap intrinsics · d92c37e0
  Krzysztof Parzyszek authored Apr 19, 2018
  d92c37e0
- [X86][BtVer2] Remove SSE4A EXTRQ/EXTRQI InstRW overrides. · f21ace6c
  Simon Pilgrim authored Apr 19, 2018
  f21ace6c
- [Hexagon] Add/fix patterns for 32/64-bit vector compares and logical ops · 23bcf06a
  Krzysztof Parzyszek authored Apr 19, 2018
  23bcf06a
- [Unittests] Fix plugins test · aeb6c48d
  Mikhail Maltsev authored Apr 19, 2018
  aeb6c48d
- [mips] Correct the definitions of the unaligned word memory operation instructions · 5d61c8b2
  Simon Dardis authored Apr 19, 2018
  5d61c8b2
- [NFC][InstCombine] A few more tests for masked merge add/xor -> or with constant mask · d536de1e
  Roman Lebedev authored Apr 19, 2018
  d536de1e
- Lowering x86 adds/addus/subs/subus intrinsics (llvm part) · e8fed154
  Alexander Ivchenko authored Apr 19, 2018
  e8fed154
- Remove file accidentally added in r330320. · 9a175bc1
  Florian Hahn authored Apr 19, 2018
  9a175bc1
- [IR/BasicBlockTest] Fix asan failure introduced in rL330316. · 2342533e
  Florian Hahn authored Apr 19, 2018
  2342533e
- [X86][FMA] Remove FMA reg-reg InstRW scheduler overrides. · 3c06617f
  Simon Pilgrim authored Apr 19, 2018
  3c06617f
- [X86][BtVer2] Remove 128-bit F16C InstRW overrides. · 33dede90
  Simon Pilgrim authored Apr 19, 2018
  33dede90
- [llvm-exegesis] Fix PfmIssueCountersTable creation · b04cd1b9
  Simon Pilgrim authored Apr 19, 2018
  b04cd1b9
- [BasicBlock] Add instructionsWithoutDebug methods to skip debug insts. · 147fc016
  Florian Hahn authored Apr 19, 2018
  147fc016
- [mips] Guard some macro expansions properly · fdc05268
  Simon Dardis authored Apr 19, 2018
  fdc05268
- [ARM] Add some missing FP16 VSEL test cases · a79ea80d
  Sjoerd Meijer authored Apr 19, 2018
  a79ea80d
- [AArch64][AsmParser] NFC: Cleanup parsing of scalar registers. · 50d8702f
  Sander de Smalen authored Apr 19, 2018
  50d8702f
- [X86] Scrub scheduling information for MUL/IMUL on Intel CPUs. · f846e2d1
  Craig Topper authored Apr 19, 2018
  f846e2d1
- Fix data race in X86FloatingPoint.cpp ASSERT_SORTED · cb80a3fc
  Bob Haarman authored Apr 18, 2018
  cb80a3fc
- [X86] Correct the Defs, Uses, hasSideEffects, mayLoad, mayStore for XCHG and XADD instructions. · ebf52e80
  Craig Topper authored Apr 18, 2018
  ebf52e80
Apr 18, 2018
- [NVPTX, CUDA] Added support for m8n32k16 and m32n8k16 variants of wmma instructions. · 0ae85903
  Artem Belevich authored Apr 18, 2018
  0ae85903
- [llvm-mca][X86] Add mmx versions of SSSE3 instructions · c310bfa1
  Simon Pilgrim authored Apr 18, 2018
  c310bfa1
- [RISCV] Add test changes missed from rL330293 · 9891ba34
  Alex Bradbury authored Apr 18, 2018
  9891ba34
- [RISCV] Introduce pattern for materialising immediates with 0 for lower 12 bits · 3ff2022b
  Alex Bradbury authored Apr 18, 2018
  3ff2022b
- [RISCV] Add imm-cse.ll test case · 792547b3
  Alex Bradbury authored Apr 18, 2018
  792547b3
- [NFC] test case clean up · 829cd8e2
  Lei Huang authored Apr 18, 2018
  829cd8e2
- [RISCV] Expand codegen -> compression sanity checks and move to a single file · c0464d92
  Alex Bradbury authored Apr 18, 2018
  c0464d92