Commits · a113d74e4c2953713591b6808f0654143d6d668f · Lorenzo Albano / LLVM bpEVL

Aug 31, 2004
- convert M and MD form instructions to generated asm writer · a113d74e
  Nate Begeman authored Aug 31, 2004
```
llvm-svn: 16121
```
  a113d74e
Aug 30, 2004
- Move yet more instructions over to being printed by the generated asm writer · 143cf94f
  Nate Begeman authored Aug 30, 2004
```
llvm-svn: 16112
```
  143cf94f
- Convert A-Form instructions to auto-generated asm writer · 6cdbd222
  Nate Begeman authored Aug 29, 2004
```
llvm-svn: 16107
```
  6cdbd222
- Improvements to int->float cast code for PPC-64 · 8cb6bd5f
  Nate Begeman authored Aug 29, 2004
```
llvm-svn: 16105
```
  8cb6bd5f
Aug 29, 2004

Implement the following missing functionality in the PPC backend: · 4483df8b

Nate Begeman authored Aug 29, 2004

cast fp->bool
cast ulong->fp
algebraic right shift long by non-constant value
These changes tested across most of the test suite.  Fixes Regression/casts

llvm-svn: 16081

4483df8b

Aug 21, 2004
- Move XForm instructions over to the auto-generated asm writer · 3ad3ad4f
  Nate Begeman authored Aug 21, 2004
```
llvm-svn: 15962
```
  3ad3ad4f
Aug 20, 2004

Implement code to convert SetCC into straight line code where appropriate. ... · 1b1a784a

Nate Begeman authored Aug 20, 2004

Implement code to convert SetCC into straight line code where appropriate.  Add necessary instructions for this transformation to the .td file.

llvm-svn: 15952

1b1a784a

Aug 19, 2004

Clean up floating point instruction selection. · e4e6d92d

Nate Begeman authored Aug 19, 2004

Change int->float cast code to put conversion constants in constant pool.
Shorten code sequence for constant pool fp loads.
Remove LOADLoDirect/LOADLoIndirect psuedo instructions and tweak asmwriter

llvm-svn: 15913

e4e6d92d

Aug 15, 2004
- Convert all of the DForm_6* operations, which makes all of the Zimm16 users · da2e56fb
  Chris Lattner authored Aug 15, 2004
```
dead.

llvm-svn: 15754
```
  da2e56fb
- Convert the DForm_4 over to the asmprintergen · 8a796858
  Chris Lattner authored Aug 15, 2004
```
llvm-svn: 15751
```
  8a796858
- Print mflr using the asmwriter generator · ec1cc1b8
  Chris Lattner authored Aug 14, 2004
```
llvm-svn: 15749
```
  ec1cc1b8
- Add indexed forms of load doubleword and load word algebraic for 64 bit targets · 9c7ddc3e
  Nate Begeman authored Aug 14, 2004
```
llvm-svn: 15743
```
  9c7ddc3e
Aug 13, 2004
- Add some more 64 bit instructions we need for the PowerPC-64 ISel to the tablegen files · 765cb5f8
  Nate Begeman authored Aug 13, 2004
```
llvm-svn: 15710
```
  765cb5f8
Aug 12, 2004
- Fix names of 64-bit CMP*D* opcodes, add LWA and STD* opcodes · d7344dc9
  Misha Brukman authored Aug 11, 2004
```
llvm-svn: 15668
```
  d7344dc9
Aug 11, 2004
- Add support for 64-bit CMPDI, CMPLDI, and CMPLD opcodes · 78c1dcfc
  Misha Brukman authored Aug 11, 2004
```
llvm-svn: 15667
```
  78c1dcfc
- Add doubleword load/store (64-bit only). · 28beda9b
  Misha Brukman authored Aug 11, 2004
```
llvm-svn: 15665
```
  28beda9b
Aug 10, 2004

Fix casts of float to unsigned long · 63be70d8

Nate Begeman authored Aug 10, 2004

Replace STDX (store 64 bit int indexed) with STFDX (store double indexed)
Fix latent bug in indexed load generation
Generate indexed loads and stores in many more cases

llvm-svn: 15626

63be70d8

Aug 09, 2004
- Use instruction formats as defined in the PowerPC ISA manual · 5295e1db
  Misha Brukman authored Aug 09, 2004
```
llvm-svn: 15577
```
  5295e1db
Aug 03, 2004
- Remove unused opcodes. · 8a1978fd
  Misha Brukman authored Aug 03, 2004
```
llvm-svn: 15447
```
  8a1978fd
Aug 02, 2004
- * Use simpler instruction templates to define instructions · 570dcf63
  Misha Brukman authored Aug 02, 2004
```
* Fix several extended opcodes

llvm-svn: 15423
```
  570dcf63
- Separate instruction formats from instruction definitions. · cd4f51b4
  Misha Brukman authored Aug 02, 2004
```
llvm-svn: 15414
```
  cd4f51b4
Jul 28, 2004

Renamed files: · 92ca8ecc

Misha Brukman authored Jul 27, 2004

* PowerPCReg.td => PowerPCRegisterinfo.td
* PowerPCInstrs.td => PowerPCInstrInfo.td

llvm-svn: 15295

92ca8ecc

Jul 27, 2004
- Add COND_BRANCH pseudo instruction, patch by Nate Begeman. · 83df71af
  Misha Brukman authored Jul 27, 2004
```
llvm-svn: 15283
```
  83df71af
- MovePCtoLR (which is `bl' in disguise) modifies LR implicitly · f1a7e941
  Misha Brukman authored Jul 27, 2004
```
llvm-svn: 15272
```
  f1a7e941
Jul 21, 2004
- Add SUBI instruction · 984bfdc7
  Misha Brukman authored Jul 21, 2004
```
llvm-svn: 15077
```
  984bfdc7
Jul 20, 2004
- Differentiate between global and weak symbol loads · 4aab086e
  Misha Brukman authored Jul 20, 2004
```
llvm-svn: 15037
```
  4aab086e
Jul 16, 2004
- Add IMPLICIT_DEFS pseudo-instruction; patch by: Nate Begeman · 6ed15fd1
  Misha Brukman authored Jul 16, 2004
```
llvm-svn: 14895
```
  6ed15fd1
Jul 01, 2004

* Coalesce the handy CALL* alias opcodes with the standard ones · 0648a903

Misha Brukman authored Jun 30, 2004

* Congregate more branch-and-link opcodes together
* Mark FP, CPR, and special registers as volatile across calls

llvm-svn: 14511

0648a903

Jun 30, 2004
- * Use LA instead of LWZ for LoadLoAddr · 7454c6ff
  Misha Brukman authored Jun 29, 2004
```
* Specify the isCall bit and caller-save registers for some call instrs

llvm-svn: 14501
```
  7454c6ff
Jun 28, 2004
- Fix the assembly opcode on LOADLoAddr, courtesy of Nate Begeman. · 3aad3977
  Misha Brukman authored Jun 28, 2004
```
llvm-svn: 14470
```
  3aad3977
- Set isBranch and isTerminator bits on all branch instructions. · 767fa110
  Misha Brukman authored Jun 28, 2004
```
llvm-svn: 14469
```
  767fa110
Jun 21, 2004
- Initial revision · e05203fb
  Misha Brukman authored Jun 21, 2004
```
llvm-svn: 14283
```
  e05203fb