Commits · a74e3f0c51487108c5b8afa54b83896a81660a43 · Lorenzo Albano / LLVM bpEVL · GitLab

Jul 25, 2014
- [PowerPC] Support TLS on PPC32/ELF · 7c8ae535
  Hal Finkel authored Jul 25, 2014
  7c8ae535
- [FastISel][AArch64] Add support for frameaddress intrinsic. · 5d6c43e2
  Juergen Ributzka authored Jul 25, 2014
  5d6c43e2
- [ARM] Emit ABI_PCS_R9_use build attribute. · 115d2df8
  Amara Emerson authored Jul 25, 2014
  115d2df8
- Run sort_includes.py on the AArch64 backend. · 1f8930e3
  Benjamin Kramer authored Jul 25, 2014
  1f8930e3
- [SDAG] Enable the new assert for out-of-range result numbers in · 3de980d2
  Chandler Carruth authored Jul 25, 2014
  3de980d2
- [ARM] In thumb mode, emit directive ".code 16" before file level inline · 16e47ff4
  Akira Hatanaka authored Jul 25, 2014
  16e47ff4
- [X86] Clarify some stackmap shadow optimization code as based on review · 5432649b
  Lang Hames authored Jul 25, 2014
  5432649b
- [PATCH][PPC64LE] Correct little-endian usage of vmrgh* and vmrgl*. · c9fa5dd6
  Bill Schmidt authored Jul 25, 2014
  c9fa5dd6
- Don't use 128bit functions on PPC32. · b5459e6e
  Joerg Sonnenberger authored Jul 24, 2014
  b5459e6e
- [x86] Make vector legalization of extloads work more like the "normal" · 80b86946
  Chandler Carruth authored Jul 24, 2014
  80b86946
- Target: invert condition for Windows · 8dc8fb18
  Saleem Abdulrasool authored Jul 24, 2014
  8dc8fb18
Jul 24, 2014
- [X86] Optimize stackmap shadows on X86. · f49bc3f1
  Lang Hames authored Jul 24, 2014
  f49bc3f1
- Replace an assertion with a fatal error · 9a412d13
  Reid Kleckner authored Jul 24, 2014
  9a412d13
- X86: correct library call setup for Windows itanium · c61ed047
  Saleem Abdulrasool authored Jul 24, 2014
  c61ed047
- R600: Add FMA instructions for Evergreen · 83592a2d
  Matt Arsenault authored Jul 24, 2014
  83592a2d
- X86: silence sign comparison warning · 34610e33
  Saleem Abdulrasool authored Jul 24, 2014
  34610e33
- R600: Add new functions for splitting vector loads and stores. · 83e60581
  Matt Arsenault authored Jul 24, 2014
  83e60581
- Include relative path for header outside the current directory. · c7dbc13e
  Joerg Sonnenberger authored Jul 24, 2014
  c7dbc13e
- AArch64: refactor ReconstructShuffle function · 7324e845
  Tim Northover authored Jul 24, 2014
  7324e845
- AA metadata refactoring (introduce AAMDNodes) · cc39b675
  Hal Finkel authored Jul 24, 2014
  cc39b675
- Prune redundant libdeps. · 8d745ca7
  NAKAMURA Takumi authored Jul 24, 2014
  8d745ca7
- Prune dependency to MC from each target disassembler. · 98d18be5
  NAKAMURA Takumi authored Jul 24, 2014
  98d18be5
- [ARM] Make the assembler reject unpredictable pre/post-indexed ARM STRH instructions. · 96ef72e5
  Tilmann Scheller authored Jul 24, 2014
  96ef72e5
- [mips] Fix ll and sc instructions · bdcfab11
  Daniel Sanders authored Jul 24, 2014
  bdcfab11
- R600: Match rcp node on pre-SI · 9acb9781
  Matt Arsenault authored Jul 24, 2014
  9acb9781
- R600: Fix LowerSDIV24 · 0daeb63f
  Matt Arsenault authored Jul 24, 2014
  0daeb63f
- Update library dependencies. · 9c3bd761
  NAKAMURA Takumi authored Jul 24, 2014
  9c3bd761
- R600: Implement enableClusterLoads() · 034d666b
  Matt Arsenault authored Jul 24, 2014
  034d666b
- [AArch64] Fix a bug generating incorrect instruction when building small vector. · 9a2a2c50
  Kevin Qin authored Jul 24, 2014
  9a2a2c50
- [AArch64] Disable some optimization cases for type conversion from sint to fp,... · 451f30e8
  Jiangning Liu authored Jul 24, 2014
  451f30e8
- Fixed PR20411 - bug in getINSERTPS() · 933cccf3
  Filipe Cabecinhas authored Jul 24, 2014
  933cccf3
- Fix the build when building with only the ARM backend. · 45bcf8a5
  Rafael Espindola authored Jul 23, 2014
  45bcf8a5
- Finish inverting the MC -> Object dependency. · 5addace5
  Rafael Espindola authored Jul 23, 2014
  5addace5
Jul 23, 2014
- [X86,AArch64] Extend vcmp w/ unary op combine to work w/ more constants. · 724e438c
  Jim Grosbach authored Jul 23, 2014
  724e438c
- X86: restrict combine to when type sizes are safe. · 8f6f0858
  Jim Grosbach authored Jul 23, 2014
  8f6f0858
- [NVPTX] Silence a GCC warning found by the buildbots · 2cb5e181
  Justin Holewinski authored Jul 23, 2014
  2cb5e181
- [FastISel][AArch64] Fix return type in FastLowerCall. · 1b014504
  Juergen Ributzka authored Jul 23, 2014
  1b014504
- [NVPTX] mul.wide generation works for any smaller integer source types, not... · ecca715b
  Justin Holewinski authored Jul 23, 2014
  ecca715b
- [NVPTX] Make sure we do not generate MULWIDE ISD nodes when optimizations are disabled · 511664dc
  Justin Holewinski authored Jul 23, 2014
  511664dc
- [AArch64] Lower sdiv x, pow2 using add + select + shift. · 17020f96
  Chad Rosier authored Jul 23, 2014
  17020f96