The test added in r313151 requires a target triple since it is
running through code generation. Fix bot failures by requiring
an x86 target.

llvm-svn: 313153

Differential Revision: https://reviews.llvm.org/D34695

llvm-svn: 313152

Summary:
SamplePGO indirect call profiles record the target as the original GUID
for statics. The importer had special handling to map to the normal GUID
in that case. The dead global analysis needs the same treatment or
inconsistencies arise, resulting in linker unsats due to some dead
symbols being exported and kept, leaving in references to other dead
symbols that are removed.

This can happen when a SamplePGO profile collected by one binary is used
for a different binary, so the indirect call profiles may not accurately
reflect live targets.

Reviewers: danielcdh

Subscribers: mehdi_amini, inglorion, llvm-commits, eraman

Differential Revision: https://reviews.llvm.org/D37783

llvm-svn: 313151

Summary:
Bug: https://bugs.llvm.org/show_bug.cgi?id=34450

**Problem:**

Clang-tidy check misc-unused-parameters omits parameter default value what results in its complete removal. Compilation errors might occur after clang-tidy fix.

**Patch description:**

Changed removal range. The range should end after parameter declarator, not after whole parameter declaration (which might contain a default value).

Reviewers: alexfh, xazax.hun

Reviewed By: alexfh

Subscribers: JDevlieghere, cfe-commits

Tags: #clang-tools-extra

Patch by Pawel Maciocha!

Differential Revision: https://reviews.llvm.org/D37566

llvm-svn: 313150

This patch corrects the definition of the DINSM instruction.
Specification for DINSM instruction for Mips64 says that size operand should
be 2 <= size <= 64, but it is defined as uimm5_inssize_plus1 which gives
range of 1 .. 32.

Patch by Aleksandar Beserminji.

Differential Revision: https://reviews.llvm.org/D37683

llvm-svn: 313149

Summary: It pollutes the global namespace otherwise.

Patch by: Bevin Hansson

Reviewers: jonpa

Reviewed By: jonpa

Subscribers: MatzeB, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D37555

llvm-svn: 313148

Added the following P9 instructions: extswsli, extswsli., popcntb

Differential Revision: https://reviews.llvm.org/D37342

llvm-svn: 313147

Summary: Detected by LeakSanitizer for Darwin

Reviewers: enderby, rafael

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D37750

llvm-svn: 313146

This patch fixes a heap-buffer-overflow when a malformed Mach-O has a
load command who's size extends past the end of the binary.

Fixes: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3225

Differential revision: https://reviews.llvm.org/D37439

llvm-svn: 313145

NFC.
Replacing -mcpu=skx by -mattr in the run command of the codegen test: avx512-gather-scatter-intrin.ll.

Reviewers: delena
Revision: https://reviews.llvm.org/D37799
llvm-svn: 313144

llvm-svn: 313143

Annoyingly the 132/231 variants are pretty tricky to create when you need to due to weak FMA commutation patterns.

llvm-svn: 313142

According to upcoming OpenMP 5.0 all classes/structs are now considered
as mappable, even polymorphic and with static members.

llvm-svn: 313141

Replacing with range-based loop and substituting 'using'.

Reviewed by: @MatzeB
Differential Revision: https://reviews.llvm.org/D37748

llvm-svn: 313140

This patches renames "brief" to "verbose" in de DIDumpOptions and
inverts the logic to match the new behavior where brief is the default.
Changing the default value uncovered some bugs related to the
DIDumpOptions not being propagated and have been fixed as well.

Differential revision: https://reviews.llvm.org/D37745

llvm-svn: 313139

NFC.
Updating the code gen regression test bmi2-schedule.ll to use the KNL and SKYLAKE prefixes for the run commands that use the knl and Skylake mcpu options.
The fix is in preparation for a large patch of adding all SKL scheduling information.

Reviewers: delena, zvi, RKSimon
Revision: https://reviews.llvm.org/D37796
llvm-svn: 313138

NFC.
Updating the code gen regression test bmi2-schedule.ll to use the KNL and SKYLAKE prefixes for the run commands that use the knl and Skylake mcpu options.
The fix is in preparation for a large patch of adding all SKL scheduling information.

Reviewers: delena, zvi
Revision: https://reviews.llvm.org/D37796
llvm-svn: 313137

Updating codegen test bmi2-schedule.ll to use the SKYLAKE and KNL prefix as preparatipn for an upcoming patch to add all SKL scheduling information.

llvm-svn: 313136

Summary: Support G_FPEXT operation. Selection done via TableGen'erated code.

Reviewers: zvi, guyblank, aymanmus, m_zuckerman

Reviewed By: zvi

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34816

llvm-svn: 313135

This patch, together with a matching clang patch (https://reviews.llvm.org/D37694), implements the lowering of X86 ABS intrinsics to IR.

differential revision: https://reviews.llvm.org/D37693.

llvm-svn: 313134

This patch, together with a matching llvm patch (https://reviews.llvm.org/D37693), implements the lowering of X86 ABS intrinsics to IR.

Differential Revision: https://reviews.llvm.org/D37694

llvm-svn: 313133

Adding x86 Processor families to initialize several uArch properties (based on the family)
This patch shows how gather cost can be initialized based on the proc. family

Differential Revision: https://reviews.llvm.org/D35348

llvm-svn: 313132

Add explicit mc-encoding checks showing that the AVX512VL ABS intrinsics are actually mapped to EVEX encoding.
This is a pre-commit for a soon to come patch which will lower x86 target specific ABS intrinsics to IR.

Differential Revision: https://reviews.llvm.org/D37688

llvm-svn: 313131

llvm-svn: 313130

llvm-svn: 313129

llvm-svn: 313128

There is no need to scan over all input sections for relocatable output.
As we do not process or scan relocations anyways.
Patch moves check for Config->Relocatable out to avoid that and also removes
excessive check for isa<EhInputSection> from first for loop. 
It is excessive because we handle all of them in a second for loop below.
That all allowed to simplify code.

Differential revision: https://reviews.llvm.org/D37746

llvm-svn: 313127

[X86] Make sure we emit a SUBREG_TO_REG after the MOV32ri when creating a BEXTR64rr instruction from a shift/and pair.

Fixes PR34589.

llvm-svn: 313126

Differential Revision: https://reviews.llvm.org/D37761

llvm-svn: 313125

Differential Revision: https://reviews.llvm.org/D37769

llvm-svn: 313124

This fixes PR31824.

Differential Revision: https://reviews.llvm.org/D37709

llvm-svn: 313123

Using the system default 'ar' might not be the right choice when
cross compiling.

Don't prepend the ar options by a dash, not all ar implementations
support that (llvm-ar doesn't).

Also pass the 's' option when creating the merged library, to create
an index.

Differential Revision: https://reviews.llvm.org/D37134

llvm-svn: 313122

Load with zero-extend and sign-extend from v2i8 to v2i32 is "Legal" since SSE4.1 and may be performed using PMOVZXBD , PMOVSXBD instructions.

llvm-svn: 313121

Reviewers: eugenis, alekseyshl

Subscribers: kubamracek, dberris, llvm-commits

Differential Revision: https://reviews.llvm.org/D37765

llvm-svn: 313120

When converting a PHI into a series of 'select' instructions to combine the
incoming values together according their edge masks, initialize the first
value to the incoming value In0 of the first predecessor, instead of
generating a redundant assignment 'select(Cond[0], In0, In0)'. The latter
fails when the Cond[0] mask is null, representing a full mask, which can
happen only when there's a single incoming value.

No functional changes intended nor expected other than surviving null Cond[0]'s.

This fix follows D35725, which introduced using null to represent full masks.

Differential Revision: https://reviews.llvm.org/D37619

llvm-svn: 313119

llvm-svn: 313118

Summary: Part of https://github.com/google/sanitizers/issues/637

Reviewers: eugenis, alekseyshl

Subscribers: kubamracek, llvm-commits, dberris

Differential Revision: https://reviews.llvm.org/D37766

llvm-svn: 313117

Factor out the reachability such that multiple queries to find reachability of values are fast. This is based on finding
the ANTIC points
in the CFG which do not change during hoisting. The ANTIC points are basically the dominance-frontiers in the inverse
graph. So we introduce a data structure (CHI nodes)
to keep track of values flowing out of a basic block. We only do this for values with multiple occurrences in the
function as they are the potential hoistable candidates.

This patch allows us to hoist instructions to a basic block with >2 successors, as well as deal with infinite loops in a
trivial way.
Relevant test cases are added to show the functionality as well as regression fixes from PR32821.

Regression from previous GVNHoist:
We do not hoist fully redundant expressions because fully redundant expressions are already handled by NewGVN

Differential Revision: https://reviews.llvm.org/D35918
Reviewers: dberlin, sebpop, gberry,

llvm-svn: 313116

Summary: Part of https://github.com/google/sanitizers/issues/637

Reviewers: eugenis, alekseyshl

Subscribers: kubamracek, llvm-commits, dberris

Differential Revision: https://reviews.llvm.org/D37764

llvm-svn: 313115

As discussed on llvm-commits it was decided it would be best to check
e_machine before declaring that a reserved section index is valid. The
only special e_machine value that matters here is EM_HEXAGON. This
change adds a special check for EM_HEXAGON.

Patch by Jake Ehrlich

Differential Revision: https://reviews.llvm.org/D37767

llvm-svn: 313114