Commits · bdd65351d3f39d38d3ed64cd9849d54aaac904c3 · Lorenzo Albano / LLVM bpEVL · GitLab

Sep 03, 2019
- [ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands · 2f3574c1
  David Green authored Sep 03, 2019
  2f3574c1
- [ARM] Invert CSEL predicates if the opposite is a simpler constant to materialise · 61973d97
  David Green authored Sep 03, 2019
  61973d97
- [ARM] Generate 8.1-m CSINC, CSNEG and CSINV instructions. · 57cc65ff
  David Green authored Sep 03, 2019
  57cc65ff
- [ARM] Fix MVE ldst offset ranges · 3e8d5f33
  David Green authored Sep 03, 2019
  3e8d5f33
- [ARM][MVE] Decoding of VMSR doesn't diagnose some unpredictable encodings · 3be2df24
  Oliver Stannard authored Sep 03, 2019
  3be2df24
- Bug fix on function epilog optimization (ARM backend) · 39bf484d
  Oliver Stannard authored Sep 03, 2019
  39bf484d
- [ARM] Select vmla · 8b2df85d
  Sam Tebbs authored Sep 03, 2019
  8b2df85d
Sep 02, 2019
- [ARM] Use MQPR not QPR for MVE registers · a95ec59f
  David Green authored Sep 02, 2019
  a95ec59f
Sep 01, 2019
- [ARM] Remove MVE masked loads/stores · 8469a39a
  David Green authored Sep 01, 2019
  8469a39a
Aug 29, 2019
- [ARM] MVE Masked loads and stores · 942c2e37
  David Green authored Aug 29, 2019
  942c2e37
- [RISCV] Avoid generating AssertZext for LP64 ABI when lowering floating LibCall · b39876d8
  Shiva Chen authored Aug 28, 2019
  b39876d8
Aug 28, 2019
- [TargetLowering] Add buildLegalVectorShuffle facility to help build legal shuffles · 4f4387dd
  Amaury Sechet authored Aug 28, 2019
  4f4387dd
- [ARM] Move MVEVPTBlockPass to a separate file. NFC · 379f6186
  David Green authored Aug 28, 2019
  379f6186
- [MVE] VMOVX patterns · 1c5b143c
  David Green authored Aug 28, 2019
  1c5b143c
- [ARM][ParallelDSP] Change search for muls · a761ba0f
  Sam Parker authored Aug 28, 2019
  a761ba0f
Aug 23, 2019
- [MC] Minor cleanup to MCFixup::Kind handling. NFC. · 90b6bb75
  Sam Clegg authored Aug 23, 2019
  90b6bb75
Aug 22, 2019
- Reapply: [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32 · a69d9d61
  Sam Tebbs authored Aug 22, 2019
  a69d9d61
- Revert r369626 "[ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32" · cd53ff6c
  Hans Wennborg authored Aug 22, 2019
  cd53ff6c
- [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32 · 7c6b2292
  Sam Tebbs authored Aug 22, 2019
  7c6b2292
- [TargetLowering] Remove optional arguments passing to makeLibCall · 72a41e7b
  Shiva Chen authored Aug 22, 2019
  72a41e7b
Aug 21, 2019
- Revert r367389 (and follow-up r368404); it caused PR43073. · ed18e70c
  Nico Weber authored Aug 21, 2019
  ed18e70c
- [ARM] Formatting for ARMInstrMVE.td. NFC · 717feabd
  David Green authored Aug 21, 2019
  717feabd
Aug 20, 2019
- [ARM] Select vaddva · dcfc2d40
  Sam Tebbs authored Aug 20, 2019
  dcfc2d40
Aug 19, 2019
- [ARM] Add support for MVE vaddv · f312c1ec
  Sam Tebbs authored Aug 19, 2019
  f312c1ec
- [ARM] MVE sext costs · 2bfc13fd
  David Green authored Aug 19, 2019
  2bfc13fd
Aug 17, 2019
- Reland "[ARM] push LR before __gnu_mcount_nc" · 16fa8b09
  Jian Cai authored Aug 16, 2019
  16fa8b09
- [ARM] Preserve liveness in ARMConstantIslands. · eaff844f
  Eli Friedman authored Aug 16, 2019
  eaff844f
Aug 16, 2019
- Revert "[ARM] push LR before __gnu_mcount_nc" · 2d957cfe
  Jian Cai authored Aug 16, 2019
  2d957cfe
- [ARM] push LR before __gnu_mcount_nc · f4cf3b95
  Jian Cai authored Aug 16, 2019
  f4cf3b95
- [ARM] MVE sext of a load is free · b782e61e
  David Green authored Aug 16, 2019
  b782e61e
- [ARM] Correct register for narrowing and widening MVE loads and stores. · 6e1ac424
  David Green authored Aug 16, 2019
  6e1ac424
- [ARM] Don't pretend we know how to generate MVE VLDn · 8c2c5f50
  David Green authored Aug 16, 2019
  8c2c5f50
- [ARM][LowOverheadLoops] Fix generated code for "revert". · 9b9a3084
  Eli Friedman authored Aug 15, 2019
  9b9a3084
- [SDAG] Minor code cleanup/standardization of atomic accessors [NFC] · 5c38ca35
  Philip Reames authored Aug 15, 2019
  5c38ca35
Aug 15, 2019
- Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM · 0c476111
  Daniel Sanders authored Aug 15, 2019
  0c476111
- [llvm] Migrate llvm::make_unique to std::make_unique · 0eaee545
  Jonas Devlieghere authored Aug 15, 2019
  0eaee545
- [ARM] Fix alignment checks for BE VLDRH · 3a991018
  David Green authored Aug 15, 2019
  3a991018
- [ARM] MVE predicate store patterns · 0ff2296a
  David Green authored Aug 15, 2019
  0ff2296a
- [ARM] MVE trunc to i1 vectors · 04f2f328
  David Green authored Aug 15, 2019
  04f2f328
Aug 13, 2019
- [ARM] Add MVE beats vector cost model · a655393f
  David Green authored Aug 13, 2019
  a655393f