llvm-svn: 128535

llvm-svn: 128526

When DCE clones a live range because it separates into connected components,
make sure that the clones enter the same register allocator stage as the
register they were cloned from.

For instance, clones may be split even when they where created during spilling.
Other registers created during spilling are not candidates for splitting or even
(re-)spilling.

llvm-svn: 128524

llvm-svn: 128519

llvm-svn: 128517

llvm-svn: 128515

llvm-svn: 128507

llvm-svn: 128506

llvm-svn: 128504

llvm-svn: 128503

was lowering them to sext / uxt + mul instructions. Unfortunately the
optimization passes may hoist the extensions out of the loop and separate them.
When that happens, the long multiplication instructions can be broken into
several scalar instructions, causing significant performance issue.

Note the vmla and vmls intrinsics are not added back. Frontend will codegen them
as intrinsics vmull* + add / sub. Also note the isel optimizations for catching
mul + sext / zext are not changed either.

First part of rdar://8832507, rdar://9203134

llvm-svn: 128502

llvm-svn: 128501

llvm-svn: 128499

llvm-svn: 128497

On x86 we now compile "if (a < 0 && b < 0)" into
	testl	%edi, %esi
	js	IF.THEN

llvm-svn: 128496

llvm-svn: 128495

llvm-svn: 128494

<rdar://problem/8875309> and <rdar://problem/9057191>.

llvm-svn: 128492

The spill weight is not recomputed for an unspillable register - it stays infinite.

llvm-svn: 128490

  - Also emit a list of packages and groups sorted by name
  - Avoid iterating over DenseSet so that the output of the arrays is deterministic.

llvm-svn: 128489

and Nans with the same strings as GAS supports.  rdar://8673024

llvm-svn: 128488

llvm-svn: 128487

llvm-svn: 128485

unnecesary conditionals and introduced a new convenience function.

The problem was that the list of libraries for Clang's unit tests was
<clang libraries> <system libraries> <llvm libraries>. As the llvm
libraries references symbols defined on the system libraries, those
were reported as undefined.

llvm-svn: 128484

Fixes PR9569 and will hopefully make selfhost on ASLR-enabled systems more deterministic.

llvm-svn: 128482

Check early if this is an unsupported opcode, so that we can avoid needlessly instantiating the base register in some cases.

llvm-svn: 128481

The STC_OPTION and STC2_OPTION instructions should have their coprocessor option enclosed in {}.

rdar://problem/9200661

llvm-svn: 128478

llvm-svn: 128477

llvm-svn: 128476

For ClangSACheckersEmitter, allow a package to belong to checker group, in which all its checkers will go into the group.

llvm-svn: 128474

llvm-svn: 128469

This may eliminate some uses of the spilled registers, and we don't want to
insert reloads for that.

llvm-svn: 128468

llvm-svn: 128467

llvm-svn: 128466

llvm-svn: 128465

llvm-svn: 128461

the FailBB dominator is correctly calculated. Believe it or not, there isn't a
functionality change here.

llvm-svn: 128455

vector types. This helps a lot with inlined functions when using the ARM soft
float ABI. Fixes <rdar://problem/9184212>.

llvm-svn: 128453

dominator information.

llvm-svn: 128452

llvm-svn: 128451