Revert "Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115"

This reverts commit 4d9ccb18.

Differential Revision: https://reviews.llvm.org/D98748

Statepoint instruction has a deopt section which is actually live-through the call.
Currently this is handled by special post pass after RA - fixup-statepoint-caller-saved.

This change teaches Greedy RA that if segment of live interval is ended with statepoint
instruction and its reg is used in deopt bundle then this live interval interferes regmask of this statepoint
and as a result caller-saved register cannot be assigned to this live interval.

Reviewers: reames, dantrushin
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D100296

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D100403

M68kAsmParser uses `llvm::getTheM68kTarget` from M68kInfo, therefore we
should put M68kInfo as its direct dependency. Otherwise the build will
fail when building LLVM libraries as shared objects (building LLVM
libraries statically won't have this problem though).

For further re-usage in other place.

The test is failing intermittently on GreenDragon.

rdar://76540904

When compiling for arm, build debugserver 2 way fat with an arm64 and
arm64e slice. You can only debug arm64e processes using an arm64e
debugserver.

This is a follow up of D99010. We didn't consider the live range of shape registers when hoist ldtilecfg. There maybe risks, e.g. we happen to insert it to an invalid range of some registers and get unexpected error.

This patch fixes this problem by storing the value to corresponding stack place of ldtilecfg after all its definition immediately.

This patch also fix a problem in previous code: If we don't have a ldtilecfg which dominates all AMX instructions, we cannot initialize shapes for other ldtilecfg.

There're still some optimization points left. E.g. eliminate unused mov instructions, break the def-use dependency before RA etc.

Reviewed By: LuoYuanke, xiangzhangllvm

Differential Revision: https://reviews.llvm.org/D99966

This allows custom types and attribute to parse a dimension list that
isn't necessarily terminated with `xtype`, for example something like:

#tf.shape<4x5>

Differential Revision: https://reviews.llvm.org/D100432

The arm64e architecture is a preview. On Apple Silicon, pretend the host
architecture is arm64.

When copying Zvlsseg register tuples, we split the COPY to NF whole register moves
as below:

  $v10m2_v12m2 = COPY $v4m2_v6m2 # NF = 2
=>
  $v10m2 = PseudoVMV2R_V $v4m2
  $v12m2 = PseudoVMV2R_V $v6m2

This patch copies forwardCopyWillClobberTuple from AArch64 to check
register overlapping.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D100280

The GNU assembler can't parse `.arch_extension ...` before a `;`.
So instead uniformly use raw string syntax with separate lines
instead of `;` separators in the assembly code.

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D100413

The added documents have two tables: 1 containing links to issues and papers related to ranges. And the other contains most of the sections from the One Ranges Proposal, with their dependencies linked. This will allow us to assign work that can be done in parallel.

Differential Revision: https://reviews.llvm.org/D100393

The VSX tablegen file has some rather eggregious uses of
COPY_TO_REGCLASS even in situations where it needs to use
SUBREG_TO_REG. While this produces correct code, it often doesn't
allow the register coalescer to coalesce copies and the resulting
code ends up being suboptimal. This patch just changes over
patterns that should use SUBREG_TO_REG.

This reverts commit dbc16ed1.

Differential Revision: https://reviews.llvm.org/D100422

[MLIR] PresburgerSet subtraction: add documentation and assertion saying we don't support divisions yet

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D100324

As a follow-up to D99815, this patch enables the test by using a DAG order instead of a sequential order to mitigate the platform portability issue due to `std:: _Hash_bytes`.

Reviewed By: wenlei, jsji

Differential Revision: https://reviews.llvm.org/D100351

chmod tries to be very helpful on some platforms and prevent naive mistakes, by warning the user. This results in the following error during the test:

```chmod: ...resolution-err.ll.tmp.resolution.txt: new permissions are r--rw-rw-, not r--r--r--```

To fix the test, call chmod with u.

Differential Revision: https://reviews.llvm.org/D100417

This change splits '-Wtautological-unsigned-zero-compare' by reporting
char-expressions-interpreted-as-unsigned under a separate diagnostic
'-Wtautological-unsigned-char-zero-compare'. This is beneficial for
projects that want to enable '-Wtautological-unsigned-zero-compare' but at
the same time want to keep code portable for platforms with char being
signed or unsigned, such as Chromium.

Differential Revision: https://reviews.llvm.org/D99808

An OPEN statement that affects an already connected unit
without changing its external file is required to have
STATUS="OLD" or default STATUS=.  The code was eliciting
spurious runtime errors in situations where an OPEN statement
pertained to an existing unit number but did not need to have
STATUS="OLD'.

Differential Revision: https://reviews.llvm.org/D100352

Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115

Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115

Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115

This patch collects operations that have users in a for loop and uses
them  when loop invariant operations are detected and hoisted.

Reviewed By: bondhugula, vinayaka-polymage

Differential Revision: https://reviews.llvm.org/D99761

This fixes the resolution of Rec10.Zero in ListSlices.td.

As part of this, correct the definition of complete for ListInit such that
it's complete iff all the elements in the list are complete rather than
always being complete regardless of the elements. This is the reason
Rec10.TwoFive from ListSlices.td previously resolved despite being
incomplete like Rec10.Zero was

Depends on D100247

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D100253

PATH usage on Windows is case-insensitive. There could be situations
when toolchain path can't be obtained from PATH because of
case-sensitivity of the findVCToolChainViaEnvironment.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D100361

Handles lowering conv2d to linalg's convolution operator. This implementation
only supports floating point values but handles all strides, dilations, and
padding values.

Differential Revision: https://reviews.llvm.org/D100061

This fixes a subtle issue where:

  svprf(pg, ptr, SV_ALL /*is sv_pattern instead of sv_prfop*/)

would be quietly accepted. With this change, the function declaration
guards that the third parameter is a `enum sv_prfop`. Previously `svprf`
would map directly to `__builtin_sve_svprfb`, which accepts the enum
operand as a signed integer and only checks that the incoming range is
valid, meaning that SV_ALL would be discarded as being outside the valid
immediate range, but would have allowed SV_VL1 without issuing a warning
(C) or error (C++).

Reviewed By: c-rhodes

Differential Revision: https://reviews.llvm.org/D100297

Remove warning "suggest braces" for aggregate initialization of an empty class with an aggregate base class.

I recently ran into issues with aggregates and inheritance, I'm using
it for creating a type-safe library where most of the types are build
over "tagged" std::array. After bit of cleaning and enabling -Wall
-Wextra -pedantic I noticed clang only in my pipeline gives me warning.
After a bit of focusing on it I found it's not helpful, and contemplate
disabling the warning all together. After a discussion with other
library authors I found it's bothering more people and decided to fix
it.

Removes this warning:

template<typename T, int N> struct StdArray {
    T contents[N];
  };

template<typename T, int N> struct AggregateAndEmpty : StdArray<T,N> { };

AggregateAndEmpty<int, 3> p = {1, 2, 3}; // <-- warning here about omitted braces

Per the SPIR-V spec "2.16.2. Validation Rules for Shader Capabilities":

  Composite objects in the StorageBuffer, PhysicalStorageBuffer,
  Uniform, and PushConstant Storage Classes must be explicitly
  laid out.

For other cases we don't need to attach the struct offsets.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D100386

- Add support for HLASM style integers. These are the decimal integers [0-9].
- HLASM does not support the additional prefixed integers like, `0b`, `0x`, octal integers and Masm style integers.
- To achieve this, a field `LexHLASMStyleIntegers` (similar to the `LexMasmStyleIntegers` field) is introduced in `MCAsmLexer.h` as well as a corresponding setter.

Note: This field could also go into MCAsmInfo.h. I used the previous precedent set by the `LexMasmIntegers` field.

Depends on https://reviews.llvm.org/D99286

Reviewed By: epastor

Differential Revision: https://reviews.llvm.org/D99374

The previous implementation was insufficient for checking statement
attribute mutual exclusion because attributed statements do not collect
their attributes one-at-a-time in the same way that declarations do. So
the design that was attempting to check for mutual exclusion as each
attribute was processed would not ever catch a mutual exclusion in a
statement. This was missed due to insufficient test coverage, which has
now been added for the [[likely]] and [[unlikely]] attributes.

The new approach is to check all of attributes that are to be applied
to the attributed statement in a group. This required generating
another DiagnoseMutualExclusions() function into AttrParsedAttrImpl.inc.

Originally done for rdar://problem/57155465.

rdar://76602859

Differential Revision: https://reviews.llvm.org/D100405