- Feb 23, 2017
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Rafael Espindola authored
Now that InputSectionBase is not a template there is no reason to have the two. llvm-svn: 295924
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- Feb 06, 2017
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Rui Ueyama authored
If relocations don't have addends, addends are embedded in operands. getImplicitAddend is a function to read addends. Addends can be negative numbers, so the return type of the function should be a signed integer type. llvm-svn: 294253
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- Feb 01, 2017
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Peter Smith authored
Thunks are now implemented by redirecting the relocation to the symbol S, to a symbol TS in a Thunk. The Thunk will transfer control to S. This has the following implications: - All the side-effects of Thunks happen within createThunks() - Thunks are no longer stored in InputSections and Symbols no longer need to hold a pointer to a Thunk - The synthetic Thunk sections need to be merged into OutputSections This implementation is almost a direct conversion of the existing Thunks with the following exceptions: - Mips LA25 Thunks are placed before the InputSection that defines the symbol that needs a Thunk. - All ARM Thunks are placed at the end of the OutputSection of the first caller to the Thunk. Range extension Thunks are not supported yet so it is optimistically assumed that all Thunks can be reused. This is a recommit of r293283 with a fixed comparison predicate as std::merge requires a strict weak ordering. Differential revision: https://reviews.llvm.org/D29327 llvm-svn: 293757
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- Jan 28, 2017
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Rui Ueyama authored
This reverts commit r293283 because it broke MSVC build. llvm-svn: 293352
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- Jan 27, 2017
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Peter Smith authored
Thunks are now implemented by redirecting the relocation to the symbol S, to a symbol TS in a Thunk. The Thunk will transfer control to S. This has the following implications: - All the side-effects of Thunks happen within createThunks() - Thunks are no longer stored in InputSections and Symbols no longer need to hold a pointer to a Thunk - The synthetic Thunk sections need to be merged into OutputSections This implementation is almost a direct conversion of the existing Thunks with the following exceptions: - Mips LA25 Thunks are placed before the InputSection that defines the symbol that needs a Thunk. - All ARM Thunks are placed at the end of the OutputSection of the first caller to the Thunk. Range extension Thunks are not supported yet so it is optimistically assumed that all Thunks can be reused. Differential Revision: https://reviews.llvm.org/D29129 llvm-svn: 293283
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- Jan 25, 2017
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Peter Smith authored
Mapping symbols allow a mapping symbol aware disassembler to correctly disassemble the PLT when the code immediately prior to the PLT is Thumb. To implement this we add a function to add symbols with local binding to be defined in SyntheticSymbols. Differential Revision: https://reviews.llvm.org/D28956 llvm-svn: 293044
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- Jan 18, 2017
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Peter Smith authored
A necessary first step towards range extension thunks is to delay the creation of thunks until the layout of InputSections within OutputSections has been done. The change scans the relocations directly from InputSections rather than looking in the ELF File the InputSection came from. This will allow a future change to redirect the relocations to symbols defined by Thunks rather than indirect when resolving relocations. A side-effect of moving ThunkCreation is that the OutSecOff of InputSections may change in an OutputSection that contains Thunks. In well behaved programs thunks are not in OutputSections with dynamic relocations. Differential Revision: https://reviews.llvm.org/D28811 llvm-svn: 292359
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- Jan 06, 2017
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Rui Ueyama authored
The two overloaded functions hid each other. This patch merges them. llvm-svn: 291222
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- Dec 09, 2016
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Peter Smith authored
The i386 glibc ld.so expects the .got.slot entry that is relocated by a R_386_IRELATIVE relocation to point directly at the ifunc resolver and not the address of the PLT entry + 6 (thus entering the lazy resolver). This is also the case for ARM and I suspect it is because these use REL relocations and can't use the addend field to store the address of the ifunc resolver. If the lazy resolver is used we get an error message stating that only R_386_JUMP_SLOT is supported. As ARM and i386 share the same code, I've removed the ARM specific test and added a writeIgotPlt() function that by default calls writeGotPlt(). ARM and i386 override this to write the address of the ifunc resolver. Differential Revision: https://reviews.llvm.org/D27581 llvm-svn: 289198
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- Dec 07, 2016
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Rafael Espindola authored
Thanks to Rui for the suggestion. llvm-svn: 288982
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- Dec 05, 2016
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Adhemerval Zanella authored
This patch avoid getAArch64Page code duplication by removing the implementation at InputSection. llvm-svn: 288668
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- Nov 25, 2016
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Eugene Leviant authored
Differential revision: https://reviews.llvm.org/D27055 llvm-svn: 287915
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- Nov 23, 2016
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Simon Atanasyan authored
Offset between beginning of a .got section and _gp symbols used in MIPS GOT relocations calculations. Usually the expression looks like VA + Offset - GP, where VA is the .got section address, Offset - offset of the GOT entry, GP - offset between .got and _gp. Also there two "magic" symbols _gp_disp and __gnu_local_gp which hold the offset mentioned above. These symbols might be referenced by MIPS relocations. Now the linker always defines _gp symbol and uses hardcoded value for its initialization. So offset between .got and _gp is 0x7ff0. The _gp_disp and __gnu_local_gp defined if required and initialized by 0x7ff0. In fact that is not correct because _gp symbol might be defined by a linker script and holds arbitrary value. In that case we need to use this value in relocation calculation and initialize _gp_disp and __gnu_local_gp properly. The patch fixes the problem and completes fixing the bug #30311. https://llvm.org/bugs/show_bug.cgi?id=30311 Differential revision: https://reviews.llvm.org/D27036 llvm-svn: 287832
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Rui Ueyama authored
We have different functions to stringize objects to construct error messages. For InputFile, we have getFilename, and for InputSection, we have getName. You had to memorize them. I think this is the case where the function overloading comes in handy. This patch defines toString() functions that are overloaded for all these types, so that you just call it in error(). Differential Revision: https://reviews.llvm.org/D27030 llvm-svn: 287787
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Ed Maste authored
Align to the large page size (known as a superpage or huge page). FreeBSD automatically promotes large, superpage-aligned allocations. Differential Revision: https://reviews.llvm.org/D27042 llvm-svn: 287782
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- Nov 11, 2016
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Eugene Leviant authored
llvm-svn: 286590
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- Nov 10, 2016
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Eugene Leviant authored
Differential revision: https://reviews.llvm.org/D26349 llvm-svn: 286443
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- Aug 17, 2016
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Michael J. Spencer authored
The FreeBSD kernel relies on this behavior to not overwrite the boot loader. llvm-svn: 278889
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- Jul 20, 2016
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Rafael Espindola authored
We will need to do something like this to support range extension thunks since that process is iterative. Doing this also has the advantage that when doing the regular relocation scan the offset in the output section is known and we can just store that. This reduces the number of times we have to run getOffset and I think will allow a more specialized .eh_frame representation. By itself this is already a performance win. firefox master 7.295045737 patch 7.209466989 0.98826892235 chromium master 4.531254468 patch 4.509221804 0.995137623774 chromium fast master 1.836928973 patch 1.823805241 0.992855612714 the gold plugin master 0.379768791 patch 0.380043405 1.00072310839 clang master 0.642698284 patch 0.642215663 0.999249070657 llvm-as master 0.036665467 patch 0.036456225 0.994293213284 the gold plugin fsds master 0.40395817 patch 0.404384555 1.0010555177 clang fsds master 0.722045545 patch 0.720946135 0.998477367518 llvm-as fsds master 0.03292646 patch 0.032759965 0.994943428477 scylla master 3.427376378 patch 3.368316181 0.98276810292 llvm-svn: 276146
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- Jul 14, 2016
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Rui Ueyama authored
llvm-svn: 275447
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- Jul 13, 2016
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Rui Ueyama authored
Patch by H.J Lu. For x86-64 psABI, the entry size of .got and .got.plt sections is 8 bytes for both LP64 and ILP32. Add GotEntrySize and GotPltEntrySize to ELF target instead of using size of ELFT::uint. Now we can generate a simple working x32 executable. Differential Revision: http://reviews.llvm.org/D22288 llvm-svn: 275301
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Rui Ueyama authored
Config members are named after corresponding command line options. This patch renames VAStart ImageBase so that they are in line with --image-base. Differential Revision: http://reviews.llvm.org/D22277 llvm-svn: 275298
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- Jul 10, 2016
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Rui Ueyama authored
Only MipsThunk were using the function, and the way how it wrote thunk contents was different from ARM thunks. This patch makes them consistent. llvm-svn: 274997
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- Jul 08, 2016
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Peter Smith authored
The TinyPtrVector of const Thunk<ELFT>* in InputSections.h can cause build failures on certain compiler/library combinations when Thunk<ELFT> is not a complete type or is an abstract class. Fixed by making Thunk<ELFT> non Abstract. type or is an abstract class llvm-svn: 274863
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Peter Smith authored
This seems to be causing a buildbot failure on lld-x86_64-freebsd. Will reproduce locally and fix. llvm-svn: 274841
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Peter Smith authored
Generalise the Mips LA25 Thunk code and implement ARM and Thumb interworking Thunks. - Introduce a new module Thunks.cpp to store the Target Specific Thunk implementations. - DefinedRegular and Shared have a ThunkData field to record Thunk. - A Target can have more than one type of Thunk. - Support PC-relative calls to Thunks. - Support Thunks to PLT entries. - Existing Mips LA25 Thunk code integrated. - Support for ARMv7A interworking Thunks. Limitations: - Only one Thunk per SymbolBody, this is sufficient for all currently implemented Thunks. - ARM thunks assume presence of V6T2 MOVT and MOVW instructions. Differential revision: http://reviews.llvm.org/D21891 llvm-svn: 274836
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- Jun 17, 2016
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Rui Ueyama authored
llvm-svn: 272976
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- Jun 16, 2016
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Rui Ueyama authored
PltZero (or PLT[0]) was an appropriate name for the little code we have at beginning of the PLT section when we only supported x86 since the code for x86 just fits in the first PLT slot. It's not the case anymore. The code for ARM64 occupies first two slots, so PltZero spans PLT[0] and PLT[1], for example. This patch renames it to avoid confusion. llvm-svn: 272913
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Rui Ueyama authored
For ARM and MIPS, we don't need to call this function. This patch passes a symbol instead of a PLT entry address so that the target handler can call it if necessary. llvm-svn: 272910
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- Jun 08, 2016
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Rui Ueyama authored
llvm-svn: 272146
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- Jun 05, 2016
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Rafael Espindola authored
It will also be used for GT_TO_IE relaxations. llvm-svn: 271813
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Rafael Espindola authored
It will be used for more than just gots. llvm-svn: 271812
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- Jun 02, 2016
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Rafael Espindola authored
This is mostly extracted from http://reviews.llvm.org/D18960. The general idea for tlsdesc is that the two GD got entries are used for a function pointer and its argument. The dynamic linker sets both. In the non-dlopen case the dynamic linker sets the function to the identity and the argument to the offset in the tls block. All that the static linker has to do in the non-dlopen case is relocate the code to point to the got entries and create a dynamic relocation. The dlopen case is more complicated, but can be implemented in another patch. llvm-svn: 271569
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- Jun 01, 2016
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George Rimar authored
Patch implements next relaxation from latest ABI: "Convert memory operand of test and binop into immediate operand, where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions, when position-independent code is disabled." It is described in System V Application Binary Interface AMD64 Architecture Processor Supplement Draft Version 0.99.8 (https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-r249.pdf, B.2 "B.2 Optimize GOTPCRELX Relocations"). Differential revision: http://reviews.llvm.org/D20793 llvm-svn: 271405
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Rafael Espindola authored
This reverts commit r271365. Sorry, wrong branch. llvm-svn: 271366
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Rafael Espindola authored
llvm-svn: 271365
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- May 26, 2016
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George Rimar authored
llvm-svn: 270847
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- May 25, 2016
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George Rimar authored
System V Application Binary Interface AMD64 Architecture Processor Supplement Draft Version 0.99.8 (https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-r249.pdf, B.2 "B.2 Optimize GOTPCRELX Relocations") introduces possible relaxations for R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. That patch implements the next relaxation: mov foo@GOTPCREL(%rip), %reg => lea foo(%rip), %reg and also opens door for implementing all other ones. Implementation was suggested by Rafael Ávila de Espíndola with few additions and testcases by myself. Differential revision: http://reviews.llvm.org/D15779 llvm-svn: 270705
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- May 24, 2016
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Rafael Espindola authored
This reverts commit r270551. Sorry, I commited the wrong branch :-( llvm-svn: 270554
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Rafael Espindola authored
llvm-svn: 270551
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