Commits · ebf1830bb1ddb7a49f3e037bca83b3ec4f60a05c · Lorenzo Albano / LLVM bpEVL · GitLab

Apr 08, 2019
- [x86] make 8-bit shl undesirable · 50c3b290
  Sanjay Patel authored Apr 08, 2019
  50c3b290
- Use llvm::crc32 instead of crc32. NFC · 7671a1da
  Eugene Leviant authored Apr 08, 2019
  7671a1da
- [InstCombine] remove overzealous assert for shuffles (PR41419) · b33938df
  Sanjay Patel authored Apr 08, 2019
  b33938df
- [InstCombine][X86] Expand MOVMSK to generic IR (PR39927) · b4f1bfa6
  Simon Pilgrim authored Apr 08, 2019
  b4f1bfa6
- Attempt to recommit r357901 · 18873b22
  Eugene Leviant authored Apr 08, 2019
  18873b22
- [InstCombine] sdiv exact flag fixup. · 923c7c9d
  Chen Zheng authored Apr 08, 2019
  923c7c9d
- Reverting r357901 as fails to build on some of the buildbots · 03d28a44
  Eugene Leviant authored Apr 08, 2019
  03d28a44
- [Support] Add zlib independent CRC32 · ad69bd68
  Eugene Leviant authored Apr 08, 2019
  ad69bd68
- Object/Minidump: Add support for reading the ModuleList stream · aaff480c
  Pavel Labath authored Apr 08, 2019
  aaff480c
- [X86] Make LowerOperationWrapper more robust. Remove now unnecessary... · 6a6da233
  Craig Topper authored Apr 08, 2019
  6a6da233
- [ConstantRange] Delete redundnt {z,s}extOrSelf for multiplication · dc1f4a67
  Fangrui Song authored Apr 08, 2019
  dc1f4a67
Apr 07, 2019
- [ConstantRange] Add signed/unsigned unionWith() · f38b46ff
  Nikita Popov authored Apr 07, 2019
  f38b46ff
- [X86] Use (SUBREG_TO_REG (MOV32rm)) for extloadi64i8/extloadi64i16 when the... · 424417da
  Craig Topper authored Apr 07, 2019
  424417da
- [ConstantRange] Add unsigned and signed intersection types · 4246106a
  Nikita Popov authored Apr 07, 2019
  4246106a
- [LLVM-C] Allow Access to the Type of a Binary · a51883cf
  Robert Widmann authored Apr 07, 2019
  a51883cf
- [ConstantRange] Add isAllNegative() and isAllNonNegative() methods · bad648a2
  Nikita Popov authored Apr 07, 2019
  bad648a2
- Reapply [ValueTracking] Support min/max selects in computeConstantRange() · 3db93ac5
  Nikita Popov authored Apr 07, 2019
  3db93ac5
- [DWARF] DWARFDebugLine: delete unused parameter `Offset` · c4c8bcae
  Fangrui Song authored Apr 07, 2019
  c4c8bcae
- [CostModel][X86] Masked load legalization requires an binary-shuffle not a select (PR39812) · 6d7fdd9a
  Simon Pilgrim authored Apr 07, 2019
  6d7fdd9a
- [DAG] Pull out ComputeNumSignBits call to make debugging easier. NFCI. · 561ba386
  Simon Pilgrim authored Apr 07, 2019
  561ba386
- [X86][SSE] SimplifyDemandedBitsForTargetNode - Add initial PACKSS support · 07adb6ab
  Simon Pilgrim authored Apr 07, 2019
  07adb6ab
- [ConstantRange] Shl considers full-set shifting to last bit position. · 30eb5758
  Marcello Maggioni authored Apr 07, 2019
  30eb5758
- Change some StringRef::data() reinterpret_cast to bytes_begin() or arrayRefFromStringRef() · 6a0746a9
  Fangrui Song authored Apr 07, 2019
  6a0746a9
Apr 06, 2019
- [X86] When converting (x << C1) AND C2 to (x AND (C2>>C1)) << C1 during isel,... · 399102b4
  Craig Topper authored Apr 06, 2019
  399102b4
- [X86] combineBitcastvxi1 - provide dst VT and src SDValue directly. NFCI. · d0a53d49
  Simon Pilgrim authored Apr 06, 2019
  d0a53d49
- [X86] Use a signed mask in foldMaskedShiftToScaledMask to enable a shorter immediate encoding. · f9b9f8d2
  Craig Topper authored Apr 06, 2019
  f9b9f8d2
- Fix spelling mistake. NFCI. · af1cbdd3
  Simon Pilgrim authored Apr 06, 2019
  af1cbdd3
- [AMDGPU] Sort out and rename multiple CI/VI predicates · 5182302a
  Stanislav Mekhanoshin authored Apr 06, 2019
  5182302a
- [DWARF] Simplify DWARFDebugAranges::findAddress · 4be8629e
  Fangrui Song authored Apr 06, 2019
  4be8629e
- [Symbolize] Uniquify sorted vector<pair<SymbolDesc, StringRef>> · cb300f12
  Fangrui Song authored Apr 06, 2019
  cb300f12
Apr 05, 2019
- [LLVM-C] Begin to Expose A More General Binary Interface · c76b6215
  Robert Widmann authored Apr 05, 2019
  c76b6215
- [LLVM-C] Add bindings to insert basic blocks · b4baa560
  Robert Widmann authored Apr 05, 2019
  b4baa560
- [X86] Enable tail calls for CallingConv::Swift · 9d9d1b6b
  Francis Visoiu Mistrih authored Apr 05, 2019
  9d9d1b6b
- [X86] Preserve operand flag when expanding TCRETURNri · ab051a37
  Francis Visoiu Mistrih authored Apr 05, 2019
  ab051a37
- [AMDGPU] Add MachineDCE pass after RenameIndependentSubregs · c8f78f8d
  Stanislav Mekhanoshin authored Apr 05, 2019
  c8f78f8d
- [X86] Merge the different Jcc instructions for each condition code into single... · 80aa2290
  Craig Topper authored Apr 05, 2019
  80aa2290
- [X86] Merge the different SETcc instructions for each condition code into... · 7323c2bf
  Craig Topper authored Apr 05, 2019
  7323c2bf
- [X86] Merge the different CMOV instructions for each condition code into... · e0bfeb5f
  Craig Topper authored Apr 05, 2019
  e0bfeb5f
- [LCG] Add aliased functions as LCG roots · 36fc9c31
  Guozhi Wei authored Apr 05, 2019
  36fc9c31
- [AMDGPU] predicate and feature refactoring · 7895c032
  Stanislav Mekhanoshin authored Apr 05, 2019
  7895c032