Commits · eedb9648229ff14bf8d5a526099f765ea23f3777 · Lorenzo Albano / LLVM bpEVL · GitLab

Nov 18, 2019
- [RISCV] Add assembly mnemonic spell checking · eedb9648
  Simon Cook authored Nov 18, 2019
  eedb9648
Nov 16, 2019
- MCObjectStreamer: assign MCSymbols in the dummy fragment to offset 0. · bf142fc4
  James Y Knight authored Nov 10, 2019
  bf142fc4
Nov 15, 2019
- [mips] Enable `la` pseudo instruction on 64-bit arch. · 6108eb4e
  Simon Atanasyan authored Nov 12, 2019
  6108eb4e
- [mips] Do not emit R_MIPS_JALR for sym+offset in case of O32 ABI · 0287efb8
  Simon Atanasyan authored Nov 09, 2019
  0287efb8
Nov 13, 2019
- [mips] Add test to check ELF output for JAL XGOT expansion. NFC · 14d31622
  Simon Atanasyan authored Nov 10, 2019
  
  14d31622
- [mips] Add tests to check `jal sym+offset`. NFC · 3216d284
  Simon Atanasyan authored Nov 09, 2019
  
  3216d284
- [AArch64][v8.3a] Add LDRA '[xN]!' alias. · 643ac6c0
  Ahmed Bougacha authored Jun 25, 2019
  643ac6c0
Nov 12, 2019
- ARM: Don't emit R_ARM_NONE relocations to compact unwinding decoders in .ARM.exidx on Android. · 1549b469
  Peter Collingbourne authored Nov 08, 2019
  1549b469
Nov 11, 2019
- [PowerPC] Implementing overflow version for XO-Form instructions · fdf3d176
  Stefan Pintile authored Nov 08, 2019
  fdf3d176
Nov 09, 2019
- DebugInfo: Do not create a debug_macinfo section if no CUs have associated macros · 736273c7
  David Blaikie authored Nov 08, 2019
  736273c7
Nov 08, 2019
- [MC] Emit unused undefined symbol even if its binding is not set · 8f089f20
  Fangrui Song authored Sep 29, 2019
  8f089f20
- DebugInfo: Use separate macinfo contributions for each CU · 39c308f6
  David Blaikie authored Nov 08, 2019
  39c308f6
- [AMDGPU][MC] Corrected src0 for v_movrelsd_b32 and v_movrelsd_2_b32 · e25bc5e0
  Dmitry Preobrazhensky authored Nov 08, 2019
  e25bc5e0
- [RISCV] Fix evaluation of %pcrel_lo · 41449c58
  Roger Ferrer authored Nov 08, 2019
  41449c58
Nov 07, 2019
- [mips] Write `AFL_EXT_OCTEONP` flag to the `.MIPS.abiflags` section · bf996f76
  Simon Atanasyan authored Nov 05, 2019
  bf996f76
- [mips] Support `octeon+` CPU in the `.set arch=` directive · 3718102d
  Simon Atanasyan authored Nov 05, 2019
  3718102d
- [mips] Implement Octeon+ `saa` and `saad` instructions · 7bed381e
  Simon Atanasyan authored Nov 05, 2019
  7bed381e
Nov 05, 2019
- [AMDGPU] return Fail instead of SolfFail from addOperand() · de56a890
  Stanislav Mekhanoshin authored Nov 04, 2019
  de56a890
Nov 04, 2019
- [SystemZ] Improve handling of huge PC relative immediate offsets. · 580310ff
  Jonas Paulsson authored Nov 02, 2019
  580310ff
Nov 03, 2019
- [mips] Move test case for Octeon instructions to cnmips sub-folder. NFC · 52efd673
  Simon Atanasyan authored Nov 03, 2019
  
  52efd673
- [mips] Add disassembler tests for `octeon` CPU. NFC · cf954e54
  Simon Atanasyan authored Nov 03, 2019
  
  cf954e54
- [mips] Add disassembler tests for `sigrie` instruction. NFC · 5257a954
  Simon Atanasyan authored Nov 03, 2019
  
  5257a954
Nov 01, 2019
- [WebAssembly] Add experimental SIMD dot product instruction · 935c84c3
  Thomas Lively authored Oct 31, 2019
  935c84c3
- [WebAssembly] SIMD integer min and max instructions · a07019a2
  Thomas Lively authored Oct 31, 2019
  a07019a2
Oct 28, 2019
- [AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64 · b8042dbe
  Dmitry Preobrazhensky authored Oct 28, 2019
  b8042dbe
Oct 25, 2019
- Revert "[ARM] Uses "Sun Style" syntax for section switching" · a6b0219f
  Jian Cai authored Oct 25, 2019
  a6b0219f
- [ARM] Uses "Sun Style" syntax for section switching · 03de2f84
  Jian Cai authored Oct 25, 2019
  03de2f84
- Always flush pending errors in MCAsmParser · 60b403e7
  Joerg Sonnenberger authored Oct 23, 2019
  60b403e7
Oct 23, 2019
- [mips] Use `expandLoadAddress` for JAL expansion · 8e574e56
  Simon Atanasyan authored Oct 22, 2019
  8e574e56
- [mips] Implement `la` macro expansion for N32 ABI · c470a9b5
  Simon Atanasyan authored Oct 18, 2019
  
  c470a9b5
- [mips] Add tests to check `la / dla` expansion in XGOT cases. NFC · 263abc67
  Simon Atanasyan authored Oct 16, 2019
  
  263abc67
- [mips] Reformat `la / dla` expansion test cases. NFC · 82b1b39b
  Simon Atanasyan authored Oct 16, 2019
  
  82b1b39b
- [Mips] Use appropriate private label prefix based on Mips ABI · 4b63ca13
  Mirko Brkusanin authored Oct 23, 2019
  4b63ca13
Oct 18, 2019
- [X86] Fix register parsing in .seh_* in Intel syntax · 52d76554
  Reid Kleckner authored Oct 18, 2019
  52d76554
- [WebAssembly] Allow multivalue signatures in object files · 393d0f79
  Thomas Lively authored Oct 18, 2019
  393d0f79
- [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32 · 6c7d7eeb
  Dmitry Preobrazhensky authored Oct 18, 2019
  6c7d7eeb
- [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa · 7d325fe5
  Dmitry Preobrazhensky authored Oct 18, 2019
  7d325fe5
- [AArch64] Adding support for PMMIR_EL1 register · ffcd7698
  Victor Campos authored Oct 18, 2019
  ffcd7698
Oct 16, 2019
- [lit] Fix internal diff's --strip-trailing-cr and use it · 2622419c
  Joel E. Denny authored Oct 16, 2019
  2622419c
- [AArch64,Assembler] Compiler support for ID_MMFR5_EL1 · b6dd1286
  Mark Murray authored Oct 16, 2019
  b6dd1286