Commits · f42454b94b035cd4ad65c8470bb56e761f79b86e · Lorenzo Albano / LLVM bpEVL · GitLab

Oct 10, 2016
- Move the global variables representing each Target behind accessor function · f42454b9
  Mehdi Amini authored Oct 09, 2016
  f42454b9
Oct 09, 2016
- DAG: Setting Masked-Expand-Load as a variant of Masked-Load node · 5b10aa1f
  Elena Demikhovsky authored Oct 09, 2016
  5b10aa1f
- [AVX-512] Fix execution domain for EVEX encoded VINSERTPS. · 43973154
  Craig Topper authored Oct 09, 2016
  43973154
- MC: Remove unused entities. · cc723ccc
  Peter Collingbourne authored Oct 09, 2016
  cc723ccc
- Target: Remove unused entities. · 5c924d71
  Peter Collingbourne authored Oct 09, 2016
  5c924d71
- [AVX-512] Add subvector insert and extract to load/store folding tables. · e30cb00d
  Craig Topper authored Oct 09, 2016
  e30cb00d
- [AVX-512] Add the vector down convert instructions to the store folding tables. · 4262d530
  Craig Topper authored Oct 09, 2016
  4262d530
Oct 08, 2016
- Turn cl::values() (for enum) from a vararg function to using C++ variadic template · 732afdd0
  Mehdi Amini authored Oct 08, 2016
  732afdd0
- [AVX-512] Fix a bug in getLargestLegalSuperClass where we inflated to... · 086f0c14
  Craig Topper authored Oct 08, 2016
  086f0c14
- [Hexagon] Adding change of flow max 1 (cofMax1) TS flag for marking this... · c69f7ff6
  Colin LeMahieu authored Oct 08, 2016
  c69f7ff6
- [AArch64] Avoid generating indexed vector instructions for Exynos · eb65d72d
  Sebastian Pop authored Oct 08, 2016
  eb65d72d
- [AVR] Add backend dependencies to MCTargetDesc/LLVMBuild.txt · f96ffe1e
  Dylan McKay authored Oct 08, 2016
  f96ffe1e
- Fix incorrect assertion in AVRFrameLowering.cpp · 552b7856
  Dylan McKay authored Oct 08, 2016
  552b7856
- [AVR] Don't worry about call frame size when initializing frame pointer · b16b6d57
  Dylan McKay authored Oct 08, 2016
  b16b6d57
- [AVR] Don't shadow container while iterating in range-based loop · 7c2d41aa
  Dylan McKay authored Oct 08, 2016
  7c2d41aa
- [AVR] Use references rather than pointers in AVRISelLowering · a1a944e3
  Dylan McKay authored Oct 08, 2016
  a1a944e3
- Allow a maximum of 64 bits to be returned in registers · 12109e73
  Dylan McKay authored Oct 08, 2016
  12109e73
- [AVR] Expand MULHS for all types · c1ff65cf
  Dylan McKay authored Oct 08, 2016
  c1ff65cf
- [AVR] Add the 'SoftFail' field to all instruction formats · ddb7a59f
  Dylan McKay authored Oct 08, 2016
  ddb7a59f
- [AVR] Set up the instruction printer and the assembly backend · 24d02ee1
  Dylan McKay authored Oct 08, 2016
  24d02ee1
- [AVR] Add dependencies to AVR libraries in AVRCodeGen · 2b0936d4
  Dylan McKay authored Oct 08, 2016
  2b0936d4
- [AVR] Add missing subdirectories to LLVMBuild · 07897f54
  Dylan McKay authored Oct 08, 2016
  07897f54
- [AVR] Add the assembly printer · 4d82df32
  Dylan McKay authored Oct 08, 2016
  4d82df32
- AMDGPU/SI: Handle div_fmas hazard in GCNHazardRecognizer · 5ab6154d
  Tom Stellard authored Oct 07, 2016
  5ab6154d
Oct 07, 2016
- AMDGPU/SI: Add support for 8-byte relocations · 6982bb8f
  Tom Stellard authored Oct 07, 2016
  6982bb8f
- [Hexagon][NFC] Using documented instruction type name V4LDST instead of MEMOP. · 9694825d
  Colin LeMahieu authored Oct 07, 2016
  9694825d
- AMDGPU/SI: Emit fixups for long branches · ef33c4b3
  Tom Stellard authored Oct 07, 2016
  ef33c4b3
- [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3. · 73f1ab28
  Artem Tamazov authored Oct 07, 2016
  73f1ab28
- [AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h · a3ec5c10
  Sam Kolton authored Oct 07, 2016
  a3ec5c10
- [AMDGPU] AMDGPUCodeGenPrepare: remove extra ';' · c09e2d7e
  Konstantin Zhuravlyov authored Oct 07, 2016
  c09e2d7e
- [AMDGPU] Promote uniform (i1, i16] operations to i32 · f74fc60a
  Konstantin Zhuravlyov authored Oct 07, 2016
  f74fc60a
- [ARM]: add missing switch case for cortex-r52 · 9797989c
  Javed Absar authored Oct 07, 2016
  9797989c
- [ARM] Reapply: Use __rt_div functions for divrem on Windows · 04864f45
  Martin Storsjö authored Oct 07, 2016
  04864f45
- [ARM]: Add Cortex-R52 target to LLVM · fb4b6e8d
  Javed Absar authored Oct 07, 2016
  fb4b6e8d
- [X86][SSE] Update register class during MOVSD/MOVSS - BLENDPD/BLENDPS commutation · a5d019ee
  Simon Pilgrim authored Oct 07, 2016
  a5d019ee
- [ARM] Don't convert switches to lookup tables of pointers with ROPI/RWPI · 4df1cc0b
  Oliver Stannard authored Oct 07, 2016
  4df1cc0b
- Use StringRef in ARMELFStreamer (NFC) · 68c6c8cd
  Mehdi Amini authored Oct 07, 2016
  68c6c8cd
- AMDGPU: Fix use-after-free in SIOptimizeExecMasking · 87bc4c21
  Nicolai Haehnle authored Oct 07, 2016
  87bc4c21
- Use StringReg in TargetParser APIs (NFC) · a0016ec9
  Mehdi Amini authored Oct 07, 2016
  a0016ec9
- Revert "Revert "Add a static_assert to enforce that parameters to... · 9ff8e87c
  Mehdi Amini authored Oct 07, 2016
  9ff8e87c