Commits · fa9439fac84ea4eb4050aa1ae150c0ec2cf86c20 · Lorenzo Albano / LLVM bpEVL · GitLab

Feb 27, 2020
- [AArch64][SVE] Add intrinsics for first-faulting gather loads · fa9439fa
  Andrzej Warzynski authored Feb 21, 2020
  fa9439fa
- [DebugInfo][ARM] Fix noreg case when checkig if it is an addImm · 58d9e819
  Djordje Todorovic authored Feb 27, 2020
  58d9e819
- [AArch64] Peephole optimization: merge AND and TST instructions · 13db7490
  Sjoerd Meijer authored Feb 27, 2020
  13db7490
Feb 26, 2020
- [AArch64][GlobalISel] Fixup <32b heterogeneous regbanks of G_PHIs just before selection. · 65f99b53
  Amara Emerson authored Feb 24, 2020
  65f99b53
- [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup · 9c859fc5
  Kerry McLaughlin authored Feb 26, 2020
  9c859fc5
- [AArch64] Flip default for register renaming in the ld/st optimizier. · a059be72
  Florian Hahn authored Feb 26, 2020
  a059be72
- [SelectionDAG][PowerPC][AArch64][X86][ARM] Add chain input and output the ISD::FLT_ROUNDS_ · 735d27dc
  Craig Topper authored Feb 25, 2020
  735d27dc
Feb 25, 2020
- [AArch64][SVE] Update names and comments for gathers/scatters (NFC) · cff90c93
  Andrzej Warzynski authored Feb 19, 2020
  cff90c93
- [AArch64][SVE] Add predicate reinterpret intrinsics · 72848f26
  Cullen Rhodes authored Feb 11, 2020
  72848f26
- [AArch64] SVE implies fullfp16 · 248eaff8
  Eli Friedman authored Feb 21, 2020
  248eaff8
Feb 24, 2020
- [AArch64][SVE] Add the SVE dupq_lane intrinsic · f87f23c8
  Kerry McLaughlin authored Feb 24, 2020
  f87f23c8
- [AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions · f2ff1534
  Kerry McLaughlin authored Feb 24, 2020
  f2ff1534
Feb 21, 2020
- [AArch64] Delete an unneeded dependency on Object after 1874dee5 · fddbff14
  Fangrui Song authored Feb 21, 2020
  fddbff14
- [AArch64][SVE] Fix -DBUILD_SHARED_LIBS=on builds after... · fad1c750
  Fangrui Song authored Feb 21, 2020
  fad1c750
- [AArch64][SVE] Fix -Wimplicit-fallthrough after D73711 · 5c33a81b
  Fangrui Song authored Feb 21, 2020
  
  5c33a81b
- [AArch64][SVE] Add support for DestructiveBinary and DestructiveBinaryComm DestructiveInstTypes · a5b22b76
  Cameron McInally authored Feb 21, 2020
  a5b22b76
- [macho][NFC] Extract all CPU_(SUB_)TYPE logic to BinaryFormat · 1874dee5
  Francis Visoiu Mistrih authored Feb 18, 2020
  1874dee5
- [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE. · 33bf1196
  Francesco Petrogalli authored Feb 13, 2020
  33bf1196
- [llvm][aarch64] SVE addressing modes. · e2ed1d14
  Francesco Petrogalli authored Jan 28, 2020
  e2ed1d14
- [AArch64][SVE] Add backend support for splats of immediates · 266959c0
  Cameron McInally authored Feb 21, 2020
  266959c0
- [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations · db9c40f5
  Danilo Carvalho Grael authored Feb 21, 2020
  db9c40f5
Feb 20, 2020
- Revert "[AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations" · 6f4d9d10
  Nico Weber authored Feb 20, 2020
  6f4d9d10
- [llvm][build] Fix shared lib builds. [NFC] · 0c8fa6db
  Francesco Petrogalli authored Feb 20, 2020
  0c8fa6db
- Revert "[macho][NFC] Extract all CPU_(SUB_)TYPE logic to libObject" · 3f785212
  Francis Visoiu Mistrih authored Feb 20, 2020
  3f785212
- [macho][NFC] Extract all CPU_(SUB_)TYPE logic to libObject · 726c342c
  Francis Visoiu Mistrih authored Feb 18, 2020
  726c342c
- [AArch64] Move isOverflowIntrOpRes help function to the ISD namespace in SelectionDAG.h. NFC · 9bbf271f
  Craig Topper authored Feb 20, 2020
  9bbf271f
- [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations · ce70e289
  Danilo Carvalho Grael authored Feb 20, 2020
  ce70e289
- Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" · 2f215cf3
  Djordje Todorovic authored Feb 20, 2020
  2f215cf3
- [AArch64][SVE] Re-arrange definitions in AArch64SVEInstrInfo.td (NFC) · 0e417b03
  Andrzej Warzynski authored Feb 20, 2020
  0e417b03
Feb 19, 2020
- [AArch64][SVE] Add initial backend support for FP splat_vector · 39317349
  Cameron McInally authored Feb 19, 2020
  39317349
- [AArch64][ASMParser] Refuse equal source/destination for LDRAA/LDRAB · 39cecabe
  Pierre-vh authored Feb 19, 2020
  39cecabe
- [TargetLower] Update shouldFormOverflowOp check if math is used. · 216afd33
  Florian Hahn authored Feb 19, 2020
  216afd33
- [AArch64][SVE] Add SVE2 intrinsics for polynomial arithmetic · 63236078
  Kerry McLaughlin authored Feb 19, 2020
  63236078
- Reland "[DebugInfo] Enable the debug entry values feature by default" · faff707d
  Djordje Todorovic authored Feb 19, 2020
  faff707d
Feb 18, 2020
- Add OffsetIsScalable to getMemOperandWithOffset · 8fbc9258
  Sander de Smalen authored Feb 18, 2020
  8fbc9258
- Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" · 2bf44d11
  Djordje Todorovic authored Feb 18, 2020
  2bf44d11
- [AArch64] Add Cortex-A34 Support for clang and llvm · 4518aab2
  Luke Geeson authored Feb 11, 2020
  4518aab2
- Reland "[DebugInfo] Enable the debug entry values feature by default" · a82d3e8a
  Djordje Todorovic authored Feb 18, 2020
  a82d3e8a
- [AArch64][SVE] Add remaining SVE2 intrinsics for widening DSP operations · d4576080
  Kerry McLaughlin authored Feb 18, 2020
  d4576080
Feb 17, 2020
- [AArch64] Implement passing SVE vectors by ref for AAPCS. · a7a96c72
  Sander de Smalen authored Feb 17, 2020
  a7a96c72