Commits · fb1baef1c0f28a2ad9071843e2b620e2ee30aaf6 · Lorenzo Albano / LLVM bpEVL · GitLab

Sep 13, 2017
- Add options to dump PGO counts in text. · a43913cf
  Hiroshi Yamauchi authored Sep 13, 2017
  a43913cf
- [ThinLTO] AliasSummary should not have any references · cbdc5ff6
  Teresa Johnson authored Sep 13, 2017
  cbdc5ff6
- ThinLTO: Correctly follow aliasee references when dead stripping. · d067c8ed
  Peter Collingbourne authored Sep 13, 2017
  d067c8ed
- Convenience/safety fix for llvm::sys::Execute(And|No)Wait · 208eecd5
  Alexander Kornienko authored Sep 13, 2017
  208eecd5
- [ThinLTO] For SamplePGO, need to handle ICP targets consistently in thin link · 1958083d
  Teresa Johnson authored Sep 13, 2017
  1958083d
- [mips] correct operand range for DINSM instruction · 50e06815
  Petar Jovanovic authored Sep 13, 2017
  50e06815
- [MachineScheduler] Put SchedRegion in an anonymous namespace. · 4eb2a96e
  Mikael Holmen authored Sep 13, 2017
  4eb2a96e
- [Power9] Add missing instructions: extswsli, popcntb · dff606ec
  Stefan Pintilie authored Sep 13, 2017
  dff606ec
- [MachO] Prevent heap overflow when load command extends past EOF · 81f5abe1
  Jonas Devlieghere authored Sep 13, 2017
  81f5abe1
- [dwarfdump] Rename Brief to Verbose in DIDumpOptions · 27476ce2
  Jonas Devlieghere authored Sep 13, 2017
  27476ce2
- [GlobalISel][X86] support G_FPEXT operation. · 5c721199
  Igor Breger authored Sep 13, 2017
  5c721199
- [X86] [PATCH] [intrinsics] Lowering X86 ABS intrinsics to IR. (llvm) · 5d5da5f5
  Uriel Korach authored Sep 13, 2017
  5d5da5f5
- [X86] Adding X86 Processor Families · e9aebf26
  Mohammed Agabaria authored Sep 13, 2017
  e9aebf26
- [X86] Make sure we emit a SUBREG_TO_REG after the MOV32ri when creating a... · 2b6bfda5
  Craig Topper authored Sep 13, 2017
  2b6bfda5
- [X86 CodeGen] Optimization of ZeroExtendLoad for v2i8 vector · 6cab1294
  Elena Demikhovsky authored Sep 13, 2017
  6cab1294
- [LV] Fix PR34523 - avoid generating redundant selects · e2a8c075
  Ayal Zaks authored Sep 13, 2017
  e2a8c075
- [GVNHoist] Factor out reachability to search for anticipable instructions quickly · dfa8741c
  Aditya Kumar authored Sep 13, 2017
  dfa8741c
- [X86] Use isUInt<32> to simplify some code. NFC · 0a3bcebc
  Craig Topper authored Sep 13, 2017
  0a3bcebc
- [ARC] Prepare the implementation of relocation for LLD · 49277d1f
  Leslie Zhai authored Sep 13, 2017
  49277d1f
- [InstCombine] Add a flag to disable LowerDbgDeclare · 8a1cd910
  Reid Kleckner authored Sep 13, 2017
  8a1cd910
- [Fuchsia] Magenta -> Zircon · c35fe2b7
  Petr Hosek authored Sep 13, 2017
  c35fe2b7
- [WebAssembly] Add sign extend instructions from atomics proposal · a519fe5a
  Derek Schuff authored Sep 13, 2017
  a519fe5a
- [x86] eliminate unnecessary vector compare for AVX masked store · 65927945
  Sanjay Patel authored Sep 12, 2017
  65927945
Sep 12, 2017
- Refactor the code to pass down ACT to SampleProfileLoader correctly. · f3ed14d3
  Dehao Chen authored Sep 12, 2017
  f3ed14d3
- Remove -generate-dwarf-pub-sections flag. · 876da029
  Peter Collingbourne authored Sep 12, 2017
  876da029
- IR: Represent -ggnu-pubnames with a flag on the DICompileUnit. · b52e2366
  Peter Collingbourne authored Sep 12, 2017
  b52e2366
- [mips] handle UImm16_AltRelaxed match type · e4dacb75
  Petar Jovanovic authored Sep 12, 2017
  e4dacb75
- Make promoteLoopAccessesToScalars independent of AliasSet [NFC] · 80b806bf
  Alina Sbirlea authored Sep 12, 2017
  80b806bf
- [AArch64][GlobalISel] Select all fpexts. · 106dd035
  Ahmed Bougacha authored Sep 12, 2017
  106dd035
- [AArch64][GlobalISel] Select all fptruncs. · a7aa2a9f
  Ahmed Bougacha authored Sep 12, 2017
  a7aa2a9f
- Update branch coalescing to be a PowerPC specific pass · 34e66217
  Lei Huang authored Sep 12, 2017
  34e66217
- [WebAssembly] Remove flags from MCSectionWasm · 2176a9f2
  Sam Clegg authored Sep 12, 2017
  2176a9f2
- Revert "[DWARF] Incorrect prologue end line record." · 51529eb0
  Robert Lougher authored Sep 12, 2017
  51529eb0
- bpf: Add BPF AsmParser support in LLVM · 06ff655e
  Yonghong Song authored Sep 12, 2017
  06ff655e
- [X86] Move matching of (and (srl/sra, C), (1<<C) - 1) to BEXTR/BEXTRI instruction to custom isel · 958106d0
  Craig Topper authored Sep 12, 2017
  958106d0
- [DWARF] Incorrect prologue end line record. · f696a22d
  Robert Lougher authored Sep 12, 2017
  f696a22d
- [LV] Clamp the VF to the trip count · 9f1be02f
  Anna Thomas authored Sep 12, 2017
  9f1be02f
- Revert r313009 "[ARM] Use ADDCARRY / SUBCARRY" · 8c1eb106
  Hans Wennborg authored Sep 12, 2017
  8c1eb106
- [SLP] Fix for PHINode during horizontal reduction scanning, NFC. · a26d3e83
  Alexey Bataev authored Sep 12, 2017
  a26d3e83
- [SystemZ] Add the CoveredBySubRegs bit to GPR64, GPR128 and FPR128 registers. · fc4f323a
  Jonas Paulsson authored Sep 12, 2017
  fc4f323a