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//===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the SplitAnalysis class as well as mutator functions for
// live range splitting.
//
//===----------------------------------------------------------------------===//
#include "SplitKit.h"
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#include "LiveRangeEdit.h"
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#include "VirtRegMap.h"
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#include "llvm/CodeGen/CalcSpillWeights.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
static cl::opt<bool>
AllowSplit("spiller-splits-edges",
cl::desc("Allow critical edge splitting during spilling"));
//===----------------------------------------------------------------------===//
// Split Analysis
//===----------------------------------------------------------------------===//
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SplitAnalysis::SplitAnalysis(const MachineFunction &mf,
const LiveIntervals &lis,
const MachineLoopInfo &mli)
: MF(mf),
LIS(lis),
Loops(mli),
TII(*mf.getTarget().getInstrInfo()),
CurLI(0) {}
void SplitAnalysis::clear() {
UseSlots.clear();
UsingInstrs.clear();
UsingBlocks.clear();
UsingLoops.clear();
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LiveBlocks.clear();
}
bool SplitAnalysis::canAnalyzeBranch(const MachineBasicBlock *MBB) {
MachineBasicBlock *T, *F;
SmallVector<MachineOperand, 4> Cond;
return !TII.AnalyzeBranch(const_cast<MachineBasicBlock&>(*MBB), T, F, Cond);
/// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
const MachineRegisterInfo &MRI = MF.getRegInfo();
for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg),
E = MRI.reg_end(); I != E; ++I) {
MachineOperand &MO = I.getOperand();
if (MO.isUse() && MO.isUndef())
continue;
MachineInstr *MI = MO.getParent();
if (MI->isDebugValue() || !UsingInstrs.insert(MI))
continue;
UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex());
MachineBasicBlock *MBB = MI->getParent();
if (UsingBlocks[MBB]++)
continue;
for (MachineLoop *Loop = Loops.getLoopFor(MBB); Loop;
Loop = Loop->getParentLoop())
UsingLoops[Loop]++;
array_pod_sort(UseSlots.begin(), UseSlots.end());
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calcLiveBlockInfo();
<< UsingInstrs.size() << " instrs, "
<< UsingBlocks.size() << " blocks, "
<< UsingLoops.size() << " loops.\n");
}
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/// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
/// where CurLI is live.
void SplitAnalysis::calcLiveBlockInfo() {
if (CurLI->empty())
return;
LiveInterval::const_iterator LVI = CurLI->begin();
LiveInterval::const_iterator LVE = CurLI->end();
SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
UseI = UseSlots.begin();
UseE = UseSlots.end();
// Loop over basic blocks where CurLI is live.
MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
for (;;) {
BlockInfo BI;
BI.MBB = MFI;
SlotIndex Start, Stop;
tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
// The last split point is the latest possible insertion point that dominates
// all successor blocks. If interference reaches LastSplitPoint, it is not
// possible to insert a split or reload that makes CurLI live in the
// outgoing bundle.
MachineBasicBlock::iterator LSP = LIS.getLastSplitPoint(*CurLI, BI.MBB);
if (LSP == BI.MBB->end())
BI.LastSplitPoint = Stop;
else
BI.LastSplitPoint = LIS.getInstructionIndex(LSP);
// LVI is the first live segment overlapping MBB.
BI.LiveIn = LVI->start <= Start;
if (!BI.LiveIn)
BI.Def = LVI->start;
// Find the first and last uses in the block.
BI.Uses = hasUses(MFI);
if (BI.Uses && UseI != UseE) {
BI.FirstUse = *UseI;
assert(BI.FirstUse >= Start);
do ++UseI;
while (UseI != UseE && *UseI < Stop);
BI.LastUse = UseI[-1];
assert(BI.LastUse < Stop);
}
// Look for gaps in the live range.
bool hasGap = false;
BI.LiveOut = true;
while (LVI->end < Stop) {
SlotIndex LastStop = LVI->end;
if (++LVI == LVE || LVI->start >= Stop) {
BI.Kill = LastStop;
BI.LiveOut = false;
break;
}
if (LastStop < LVI->start) {
hasGap = true;
BI.Kill = LastStop;
BI.Def = LVI->start;
}
}
// Don't set LiveThrough when the block has a gap.
BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
LiveBlocks.push_back(BI);
// LVI is now at LVE or LVI->end >= Stop.
if (LVI == LVE)
break;
// Live segment ends exactly at Stop. Move to the next segment.
if (LVI->end == Stop && ++LVI == LVE)
break;
// Pick the next basic block.
if (LVI->start < Stop)
++MFI;
else
MFI = LIS.getMBBFromIndex(LVI->start);
}
}
void SplitAnalysis::print(const BlockPtrSet &B, raw_ostream &OS) const {
for (BlockPtrSet::const_iterator I = B.begin(), E = B.end(); I != E; ++I) {
unsigned count = UsingBlocks.lookup(*I);
OS << " BB#" << (*I)->getNumber();
if (count)
OS << '(' << count << ')';
}
}
// Get three sets of basic blocks surrounding a loop: Blocks inside the loop,
// predecessor blocks, and exit blocks.
void SplitAnalysis::getLoopBlocks(const MachineLoop *Loop, LoopBlocks &Blocks) {
Blocks.clear();
// Blocks in the loop.
Blocks.Loop.insert(Loop->block_begin(), Loop->block_end());
// Predecessor blocks.
const MachineBasicBlock *Header = Loop->getHeader();
for (MachineBasicBlock::const_pred_iterator I = Header->pred_begin(),
E = Header->pred_end(); I != E; ++I)
if (!Blocks.Loop.count(*I))
Blocks.Preds.insert(*I);
// Exit blocks.
for (MachineLoop::block_iterator I = Loop->block_begin(),
E = Loop->block_end(); I != E; ++I) {
const MachineBasicBlock *MBB = *I;
for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
SE = MBB->succ_end(); SI != SE; ++SI)
if (!Blocks.Loop.count(*SI))
Blocks.Exits.insert(*SI);
}
}
void SplitAnalysis::print(const LoopBlocks &B, raw_ostream &OS) const {
OS << "Loop:";
print(B.Loop, OS);
OS << ", preds:";
print(B.Preds, OS);
OS << ", exits:";
print(B.Exits, OS);
}
/// analyzeLoopPeripheralUse - Return an enum describing how CurLI is used in
/// and around the Loop.
SplitAnalysis::LoopPeripheralUse SplitAnalysis::
analyzeLoopPeripheralUse(const SplitAnalysis::LoopBlocks &Blocks) {
LoopPeripheralUse use = ContainedInLoop;
for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end();
I != E; ++I) {
const MachineBasicBlock *MBB = I->first;
// Is this a peripheral block?
if (use < MultiPeripheral &&
(Blocks.Preds.count(MBB) || Blocks.Exits.count(MBB))) {
if (I->second > 1) use = MultiPeripheral;
else use = SinglePeripheral;
continue;
}
// Is it a loop block?
continue;
// It must be an unrelated block.
DEBUG(dbgs() << ", outside: BB#" << MBB->getNumber());
return OutsideLoop;
}
return use;
}
/// getCriticalExits - It may be necessary to partially break critical edges
/// leaving the loop if an exit block has predecessors from outside the loop
/// periphery.
void SplitAnalysis::getCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
BlockPtrSet &CriticalExits) {
CriticalExits.clear();
// A critical exit block has CurLI live-in, and has a predecessor that is not
// in the loop nor a loop predecessor. For such an exit block, the edges
// carrying the new variable must be moved to a new pre-exit block.
for (BlockPtrSet::iterator I = Blocks.Exits.begin(), E = Blocks.Exits.end();
I != E; ++I) {
const MachineBasicBlock *Exit = *I;
// A single-predecessor exit block is definitely not a critical edge.
if (Exit->pred_size() == 1)
// This exit may not have CurLI live in at all. No need to split.
if (!LIS.isLiveInToMBB(*CurLI, Exit))
// Does this exit block have a predecessor that is not a loop block or loop
// predecessor?
for (MachineBasicBlock::const_pred_iterator PI = Exit->pred_begin(),
PE = Exit->pred_end(); PI != PE; ++PI) {
const MachineBasicBlock *Pred = *PI;
if (Blocks.Loop.count(Pred) || Blocks.Preds.count(Pred))
continue;
// This is a critical exit block, and we need to split the exit edge.
CriticalExits.insert(Exit);
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void SplitAnalysis::getCriticalPreds(const SplitAnalysis::LoopBlocks &Blocks,
BlockPtrSet &CriticalPreds) {
CriticalPreds.clear();
// A critical predecessor block has CurLI live-out, and has a successor that
// has CurLI live-in and is not in the loop nor a loop exit block. For such a
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// predecessor block, we must carry the value in both the 'inside' and
// 'outside' registers.
for (BlockPtrSet::iterator I = Blocks.Preds.begin(), E = Blocks.Preds.end();
I != E; ++I) {
const MachineBasicBlock *Pred = *I;
// Definitely not a critical edge.
if (Pred->succ_size() == 1)
continue;
// This block may not have CurLI live out at all if there is a PHI.
if (!LIS.isLiveOutOfMBB(*CurLI, Pred))
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continue;
// Does this block have a successor outside the loop?
for (MachineBasicBlock::const_pred_iterator SI = Pred->succ_begin(),
SE = Pred->succ_end(); SI != SE; ++SI) {
const MachineBasicBlock *Succ = *SI;
if (Blocks.Loop.count(Succ) || Blocks.Exits.count(Succ))
continue;
if (!LIS.isLiveInToMBB(*CurLI, Succ))
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continue;
// This is a critical predecessor block.
CriticalPreds.insert(Pred);
break;
}
}
}
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/// canSplitCriticalExits - Return true if it is possible to insert new exit
/// blocks before the blocks in CriticalExits.
bool
SplitAnalysis::canSplitCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
BlockPtrSet &CriticalExits) {
// If we don't allow critical edge splitting, require no critical exits.
if (!AllowSplit)
return CriticalExits.empty();
for (BlockPtrSet::iterator I = CriticalExits.begin(), E = CriticalExits.end();
I != E; ++I) {
const MachineBasicBlock *Succ = *I;
// We want to insert a new pre-exit MBB before Succ, and change all the
// in-loop blocks to branch to the pre-exit instead of Succ.
// Check that all the in-loop predecessors can be changed.
for (MachineBasicBlock::const_pred_iterator PI = Succ->pred_begin(),
PE = Succ->pred_end(); PI != PE; ++PI) {
const MachineBasicBlock *Pred = *PI;
// The external predecessors won't be altered.
if (!Blocks.Loop.count(Pred) && !Blocks.Preds.count(Pred))
continue;
if (!canAnalyzeBranch(Pred))
return false;
}
// If Succ's layout predecessor falls through, that too must be analyzable.
// We need to insert the pre-exit block in the gap.
MachineFunction::const_iterator MFI = Succ;
if (MFI == MF.begin())
continue;
if (!canAnalyzeBranch(--MFI))
return false;
}
// No problems found.
return true;
}
void SplitAnalysis::analyze(const LiveInterval *li) {
clear();
}
void SplitAnalysis::getSplitLoops(LoopPtrSet &Loops) {
assert(CurLI && "Call analyze() before getSplitLoops");
if (UsingLoops.empty())
LoopBlocks Blocks;
BlockPtrSet CriticalExits;
// We split around loops where CurLI is used outside the periphery.
for (LoopCountMap::const_iterator I = UsingLoops.begin(),
E = UsingLoops.end(); I != E; ++I) {
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const MachineLoop *Loop = I->first;
getLoopBlocks(Loop, Blocks);
DEBUG({ dbgs() << " "; print(Blocks, dbgs()); });
switch(analyzeLoopPeripheralUse(Blocks)) {
case OutsideLoop:
break;
case MultiPeripheral:
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// FIXME: We could split a live range with multiple uses in a peripheral
// block and still make progress. However, it is possible that splitting
// another live range will insert copies into a peripheral block, and
// there is a small chance we can enter an infinite loop, inserting copies
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// forever.
// For safety, stick to splitting live ranges with uses outside the
// periphery.
DEBUG(dbgs() << ": multiple peripheral uses");
break;
continue;
case SinglePeripheral:
continue;
}
// Will it be possible to split around this loop?
getCriticalExits(Blocks, CriticalExits);
DEBUG(dbgs() << ": " << CriticalExits.size() << " critical exits\n");
if (!canSplitCriticalExits(Blocks, CriticalExits))
continue;
// This is a possible split.
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Loops.insert(Loop);
DEBUG(dbgs() << " getSplitLoops found " << Loops.size()
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<< " candidate loops.\n");
const MachineLoop *SplitAnalysis::getBestSplitLoop() {
LoopPtrSet Loops;
getSplitLoops(Loops);
if (Loops.empty())
return 0;
// Pick the earliest loop.
// FIXME: Are there other heuristics to consider?
const MachineLoop *Best = 0;
SlotIndex BestIdx;
for (LoopPtrSet::const_iterator I = Loops.begin(), E = Loops.end(); I != E;
++I) {
SlotIndex Idx = LIS.getMBBStartIdx((*I)->getHeader());
if (!Best || Idx < BestIdx)
Best = *I, BestIdx = Idx;
}
DEBUG(dbgs() << " getBestSplitLoop found " << *Best);
return Best;
}
/// isBypassLoop - Return true if CurLI is live through Loop and has no uses
/// inside the loop. Bypass loops are candidates for splitting because it can
/// prevent interference inside the loop.
bool SplitAnalysis::isBypassLoop(const MachineLoop *Loop) {
// If CurLI is live into the loop header and there are no uses in the loop, it
// must be live in the entire loop and live on at least one exiting edge.
return !UsingLoops.count(Loop) &&
LIS.isLiveInToMBB(*CurLI, Loop->getHeader());
}
/// getBypassLoops - Get all the maximal bypass loops. These are the bypass
/// loops whose parent is not a bypass loop.
void SplitAnalysis::getBypassLoops(LoopPtrSet &BypassLoops) {
SmallVector<MachineLoop*, 8> Todo(Loops.begin(), Loops.end());
MachineLoop *Loop = Todo.pop_back_val();
if (!UsingLoops.count(Loop)) {
// This is either a bypass loop or completely irrelevant.
if (LIS.isLiveInToMBB(*CurLI, Loop->getHeader()))
BypassLoops.insert(Loop);
// Either way, skip the child loops.
continue;
}
// The child loops may be bypass loops.
Todo.append(Loop->begin(), Loop->end());
}
}
//===----------------------------------------------------------------------===//
// LiveIntervalMap
//===----------------------------------------------------------------------===//
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// Work around the fact that the std::pair constructors are broken for pointer
// pairs in some implementations. makeVV(x, 0) works.
static inline std::pair<const VNInfo*, VNInfo*>
makeVV(const VNInfo *a, VNInfo *b) {
return std::make_pair(a, b);
}
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void LiveIntervalMap::reset(LiveInterval *li) {
LI = li;
Values.clear();
LiveOutCache.clear();
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}
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bool LiveIntervalMap::isComplexMapped(const VNInfo *ParentVNI) const {
ValueMap::const_iterator i = Values.find(ParentVNI);
return i != Values.end() && i->second == 0;
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}
// defValue - Introduce a LI def for ParentVNI that could be later than
// ParentVNI->def.
VNInfo *LiveIntervalMap::defValue(const VNInfo *ParentVNI, SlotIndex Idx) {
assert(LI && "call reset first");
assert(ParentVNI && "Mapping NULL value");
assert(Idx.isValid() && "Invalid SlotIndex");
assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
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// Create a new value.
VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
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// Preserve the PHIDef bit.
if (ParentVNI->isPHIDef() && Idx == ParentVNI->def)
VNI->setIsPHIDef(true);
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// Use insert for lookup, so we can add missing values with a second lookup.
std::pair<ValueMap::iterator,bool> InsP =
Values.insert(makeVV(ParentVNI, Idx == ParentVNI->def ? VNI : 0));
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// This is now a complex def. Mark with a NULL in valueMap.
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if (!InsP.second)
InsP.first->second = 0;
return VNI;
}
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// mapValue - Find the mapped value for ParentVNI at Idx.
// Potentially create phi-def values.
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VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
bool *simple) {
assert(LI && "call reset first");
assert(ParentVNI && "Mapping NULL value");
assert(Idx.isValid() && "Invalid SlotIndex");
assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
// Use insert for lookup, so we can add missing values with a second lookup.
std::pair<ValueMap::iterator,bool> InsP =
Values.insert(makeVV(ParentVNI, 0));
// This was an unknown value. Create a simple mapping.
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if (InsP.second) {
if (simple) *simple = true;
return InsP.first->second = LI->createValueCopy(ParentVNI,
LIS.getVNInfoAllocator());
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}
// This was a simple mapped value.
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if (InsP.first->second) {
if (simple) *simple = true;
return InsP.first->second;
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}
// This is a complex mapped value. There may be multiple defs, and we may need
// to create phi-defs.
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if (simple) *simple = false;
MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
assert(IdxMBB && "No MBB at Idx");
// Is there a def in the same MBB we can extend?
if (VNInfo *VNI = extendTo(IdxMBB, Idx))
return VNI;
// Now for the fun part. We know that ParentVNI potentially has multiple defs,
// and we may need to create even more phi-defs to preserve VNInfo SSA form.
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// Perform a search for all predecessor blocks where we know the dominating
// VNInfo. Insert phi-def VNInfos along the path back to IdxMBB.
DEBUG(dbgs() << "\n Reaching defs for BB#" << IdxMBB->getNumber()
<< " at " << Idx << " in " << *LI << '\n');
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// Blocks where LI should be live-in.
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SmallVector<MachineDomTreeNode*, 16> LiveIn;
LiveIn.push_back(MDT[IdxMBB]);
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// Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
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for (unsigned i = 0; i != LiveIn.size(); ++i) {
MachineBasicBlock *MBB = LiveIn[i]->getBlock();
for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
PE = MBB->pred_end(); PI != PE; ++PI) {
MachineBasicBlock *Pred = *PI;
// Is this a known live-out block?
std::pair<LiveOutMap::iterator,bool> LOIP =
LiveOutCache.insert(std::make_pair(Pred, LiveOutPair()));
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// Yes, we have been here before.
if (!LOIP.second) {
DEBUG(if (VNInfo *VNI = LOIP.first->second.first)
dbgs() << " known valno #" << VNI->id
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<< " at BB#" << Pred->getNumber() << '\n');
continue;
}
// Does Pred provide a live-out value?
SlotIndex Last = LIS.getMBBEndIdx(Pred).getPrevSlot();
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if (VNInfo *VNI = extendTo(Pred, Last)) {
MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(VNI->def);
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DEBUG(dbgs() << " found valno #" << VNI->id
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<< " from BB#" << DefMBB->getNumber()
<< " at BB#" << Pred->getNumber() << '\n');
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LiveOutPair &LOP = LOIP.first->second;
LOP.first = VNI;
LOP.second = MDT[DefMBB];
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continue;
}
// No, we need a live-in value for Pred as well
if (Pred != IdxMBB)
LiveIn.push_back(MDT[Pred]);
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}
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// We may need to add phi-def values to preserve the SSA form.
// This is essentially the same iterative algorithm that SSAUpdater uses,
// except we already have a dominator tree, so we don't have to recompute it.
VNInfo *IdxVNI = 0;
unsigned Changes;
do {
Changes = 0;
DEBUG(dbgs() << " Iterating over " << LiveIn.size() << " blocks.\n");
// Propagate live-out values down the dominator tree, inserting phi-defs when
// necessary. Since LiveIn was created by a BFS, going backwards makes it more
// likely for us to visit immediate dominators before their children.
for (unsigned i = LiveIn.size(); i; --i) {
MachineDomTreeNode *Node = LiveIn[i-1];
MachineBasicBlock *MBB = Node->getBlock();
MachineDomTreeNode *IDom = Node->getIDom();
LiveOutPair IDomValue;
// We need a live-in value to a block with no immediate dominator?
// This is probably an unreachable block that has survived somehow.
bool needPHI = !IDom;
// Get the IDom live-out value.
if (!needPHI) {
LiveOutMap::iterator I = LiveOutCache.find(IDom->getBlock());
if (I != LiveOutCache.end())
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IDomValue = I->second;
else
// If IDom is outside our set of live-out blocks, there must be new
// defs, and we need a phi-def here.
needPHI = true;
}
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// IDom dominates all of our predecessors, but it may not be the immediate
// dominator. Check if any of them have live-out values that are properly
// dominated by IDom. If so, we need a phi-def here.
if (!needPHI) {
for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
PE = MBB->pred_end(); PI != PE; ++PI) {
LiveOutPair Value = LiveOutCache[*PI];
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if (!Value.first || Value.first == IDomValue.first)
continue;
// This predecessor is carrying something other than IDomValue.
// It could be because IDomValue hasn't propagated yet, or it could be
// because MBB is in the dominance frontier of that value.
if (MDT.dominates(IDom, Value.second)) {
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needPHI = true;
break;
}
}
}
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// Create a phi-def if required.
if (needPHI) {
++Changes;
SlotIndex Start = LIS.getMBBStartIdx(MBB);
VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
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VNI->setIsPHIDef(true);
DEBUG(dbgs() << " - BB#" << MBB->getNumber()
<< " phi-def #" << VNI->id << " at " << Start << '\n');
// We no longer need LI to be live-in.
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LiveIn.erase(LiveIn.begin()+(i-1));
// Blocks in LiveIn are either IdxMBB, or have a value live-through.
if (MBB == IdxMBB)
IdxVNI = VNI;
// Check if we need to update live-out info.
LiveOutMap::iterator I = LiveOutCache.find(MBB);
if (I == LiveOutCache.end() || I->second.second == Node) {
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// We already have a live-out defined in MBB, so this must be IdxMBB.
assert(MBB == IdxMBB && "Adding phi-def to known live-out");
LI->addRange(LiveRange(Start, Idx.getNextSlot(), VNI));
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} else {
// This phi-def is also live-out, so color the whole block.
LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
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I->second = LiveOutPair(VNI, Node);
}
} else if (IDomValue.first) {
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// No phi-def here. Remember incoming value for IdxMBB.
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if (MBB == IdxMBB)
IdxVNI = IDomValue.first;
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// Propagate IDomValue if needed:
// MBB is live-out and doesn't define its own value.
LiveOutMap::iterator I = LiveOutCache.find(MBB);
if (I != LiveOutCache.end() && I->second.second != Node &&
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I->second.first != IDomValue.first) {
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++Changes;
I->second = IDomValue;
DEBUG(dbgs() << " - BB#" << MBB->getNumber()
<< " idom valno #" << IDomValue.first->id
<< " from BB#" << IDom->getBlock()->getNumber() << '\n');
}
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}
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DEBUG(dbgs() << " - made " << Changes << " changes.\n");
} while (Changes);
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assert(IdxVNI && "Didn't find value for Idx");
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#ifndef NDEBUG
// Check the LiveOutCache invariants.
for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
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I != E; ++I) {
assert(I->first && "Null MBB entry in cache");
assert(I->second.first && "Null VNInfo in cache");
assert(I->second.second && "Null DomTreeNode in cache");
if (I->second.second->getBlock() == I->first)
continue;
for (MachineBasicBlock::pred_iterator PI = I->first->pred_begin(),
PE = I->first->pred_end(); PI != PE; ++PI)
assert(LiveOutCache.lookup(*PI) == I->second && "Bad invariant");
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}
#endif
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// Since we went through the trouble of a full BFS visiting all reaching defs,
// the values in LiveIn are now accurate. No more phi-defs are needed
// for these blocks, so we can color the live ranges.
// This makes the next mapValue call much faster.
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for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
MachineBasicBlock *MBB = LiveIn[i]->getBlock();
SlotIndex Start = LIS.getMBBStartIdx(MBB);
VNInfo *VNI = LiveOutCache.lookup(MBB).first;
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// Anything in LiveIn other than IdxMBB is live-through.
// In IdxMBB, we should stop at Idx unless the same value is live-out.
if (MBB == IdxMBB && IdxVNI != VNI)
LI->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI));
else
LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
}
return IdxVNI;
}
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#ifndef NDEBUG
void LiveIntervalMap::dumpCache() {
for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
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I != E; ++I) {
assert(I->first && "Null MBB entry in cache");
assert(I->second.first && "Null VNInfo in cache");
assert(I->second.second && "Null DomTreeNode in cache");
dbgs() << " cache: BB#" << I->first->getNumber()
<< " has valno #" << I->second.first->id << " from BB#"
<< I->second.second->getBlock()->getNumber() << ", preds";
for (MachineBasicBlock::pred_iterator PI = I->first->pred_begin(),
PE = I->first->pred_end(); PI != PE; ++PI)
dbgs() << " BB#" << (*PI)->getNumber();
dbgs() << '\n';
}
dbgs() << " cache: " << LiveOutCache.size() << " entries.\n";
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}
#endif
// extendTo - Find the last LI value defined in MBB at or before Idx. The
// ParentLI is assumed to be live at Idx. Extend the live range to Idx.
// Return the found VNInfo, or NULL.
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VNInfo *LiveIntervalMap::extendTo(const MachineBasicBlock *MBB, SlotIndex Idx) {
assert(LI && "call reset first");
LiveInterval::iterator I = std::upper_bound(LI->begin(), LI->end(), Idx);
if (I == LI->begin())
return 0;
--I;
if (I->end <= LIS.getMBBStartIdx(MBB))
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if (I->end <= Idx)
I->end = Idx.getNextSlot();
return I->valno;
}
// addSimpleRange - Add a simple range from ParentLI to LI.
// ParentVNI must be live in the [Start;End) interval.
void LiveIntervalMap::addSimpleRange(SlotIndex Start, SlotIndex End,
const VNInfo *ParentVNI) {
assert(LI && "call reset first");
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bool simple;
VNInfo *VNI = mapValue(ParentVNI, Start, &simple);
// A simple mapping is easy.
if (simple) {
LI->addRange(LiveRange(Start, End, VNI));
return;
}
// ParentVNI is a complex value. We must map per MBB.
MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
MachineFunction::iterator MBBE = LIS.getMBBFromIndex(End.getPrevSlot());
if (MBB == MBBE) {
LI->addRange(LiveRange(Start, End, VNI));
return;
}
// First block.
LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
// Run sequence of full blocks.
for (++MBB; MBB != MBBE; ++MBB) {
Start = LIS.getMBBStartIdx(MBB);
LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB),
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mapValue(ParentVNI, Start)));
}
// Final block.
Start = LIS.getMBBStartIdx(MBB);
if (Start != End)
LI->addRange(LiveRange(Start, End, mapValue(ParentVNI, Start)));
/// addRange - Add live ranges to LI where [Start;End) intersects ParentLI.
/// All needed values whose def is not inside [Start;End) must be defined
/// beforehand so mapValue will work.
void LiveIntervalMap::addRange(SlotIndex Start, SlotIndex End) {
assert(LI && "call reset first");
LiveInterval::const_iterator B = ParentLI.begin(), E = ParentLI.end();
LiveInterval::const_iterator I = std::lower_bound(B, E, Start);
// Check if --I begins before Start and overlaps.
if (I != B) {
--I;
if (I->end > Start)
addSimpleRange(Start, std::min(End, I->end), I->valno);
++I;
}
// The remaining ranges begin after Start.
for (;I != E && I->start < End; ++I)
addSimpleRange(I->start, std::min(End, I->end), I->valno);
}
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//===----------------------------------------------------------------------===//
// Split Editor
//===----------------------------------------------------------------------===//
/// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
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SplitEditor::SplitEditor(SplitAnalysis &sa,
LiveIntervals &lis,
VirtRegMap &vrm,
MachineDominatorTree &mdt,
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LiveRangeEdit &edit)
: sa_(sa), LIS(lis), VRM(vrm),
MRI(vrm.getMachineFunction().getRegInfo()),
TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
Edit(edit),
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{
// We don't need an AliasAnalysis since we will only be performing
// cheap-as-a-copy remats anyway.
Edit.anyRematerializable(LIS, TII, 0);
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}
void SplitEditor::dump() const {
if (RegAssign.empty()) {
dbgs() << " empty\n";
return;
}
for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
dbgs() << '\n';
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}
VNInfo *ParentVNI,
SlotIndex UseIdx,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) {
MachineInstr *CopyMI = 0;
SlotIndex Def;
// Attempt cheap-as-a-copy rematerialization.
LiveRangeEdit::Remat RM(ParentVNI);
if (Edit.canRematerializeAt(RM, UseIdx, true, LIS)) {
Def = Edit.rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
} else {
// Can't remat, just insert a copy from parent.
CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
.addReg(Edit.getReg());
Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
}
// Define the value in Reg.
VNInfo *VNI = LIMappers[RegIdx].defValue(ParentVNI, Def);
VNI->setCopy(CopyMI);
// Add minimal liveness for the new value.
Edit.get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
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/// Create a new virtual register and live interval.
void SplitEditor::openIntv() {
assert(!OpenIdx && "Previous LI not closed before openIntv");
// Create the complement as index 0.
if (Edit.empty()) {
Edit.create(MRI, LIS, VRM);
LIMappers.push_back(LiveIntervalMap(LIS, MDT, Edit.getParent()));
LIMappers.back().reset(Edit.get(0));
}
// Create the open interval.
OpenIdx = Edit.size();
Edit.create(MRI, LIS, VRM);
LIMappers.push_back(LiveIntervalMap(LIS, MDT, Edit.getParent()));
LIMappers[OpenIdx].reset(Edit.get(OpenIdx));
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}
SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
assert(OpenIdx && "openIntv not called before enterIntvBefore");
DEBUG(dbgs() << " enterIntvBefore " << Idx);
Idx = Idx.getBaseIndex();
VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
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if (!ParentVNI) {
return Idx;
DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
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assert(MI && "enterIntvBefore called with invalid index");
VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
return VNI->def;
SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
SlotIndex End = LIS.getMBBEndIdx(&MBB);
SlotIndex Last = End.getPrevSlot();
DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Last);
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if (!ParentVNI) {
return End;
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}
DEBUG(dbgs() << ": valno " << ParentVNI->id);
VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
LIS.getLastSplitPoint(Edit.getParent(), &MBB));
RegAssign.insert(VNI->def, End, OpenIdx);
return VNI->def;
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}
/// useIntv - indicate that all instructions in MBB should use OpenLI.
void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
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}
void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
assert(OpenIdx && "openIntv not called before useIntv");
DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
RegAssign.insert(Start, End, OpenIdx);
DEBUG(dump());
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}
SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
assert(OpenIdx && "openIntv not called before leaveIntvAfter");
DEBUG(dbgs() << " leaveIntvAfter " << Idx);
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// The interval must be live beyond the instruction at Idx.
Idx = Idx.getBoundaryIndex();
VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
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if (!ParentVNI) {
return Idx.getNextSlot();
DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
assert(MI && "No instruction at index");
VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
llvm::next(MachineBasicBlock::iterator(MI)));
return VNI->def;
SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
SlotIndex Start = LIS.getMBBStartIdx(&MBB);
DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Start);
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if (!ParentVNI) {
return Start;
MBB.SkipPHIsAndLabels(MBB.begin()));
RegAssign.insert(Start, VNI->def, OpenIdx);
DEBUG(dump());
return VNI->def;
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}
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void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
assert(OpenIdx && "openIntv not called before overlapIntv");
assert(Edit.getParent().getVNInfoAt(Start) ==
Edit.getParent().getVNInfoAt(End.getPrevSlot()) &&
"Parent changes value in extended range");
assert(Edit.get(0)->getVNInfoAt(Start) && "Start must come from leaveIntv*");
assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
"Range cannot span basic blocks");
// Treat this as useIntv() for now. The complement interval will be extended
// as needed by mapValue().
DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
RegAssign.insert(Start, End, OpenIdx);
DEBUG(dump());
}
/// closeIntv - Indicate that we are done editing the currently open
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/// LiveInterval, and ranges can be trimmed.
assert(OpenIdx && "openIntv not called before closeIntv");
OpenIdx = 0;
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}
/// rewriteAssigned - Rewrite all uses of Edit.getReg().
void SplitEditor::rewriteAssigned() {
for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit.getReg()),