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FoldPt->getOpcode() != TRI->getCallFrameDestroyOpcode()) {
if (RefsInMBB.count(FoldPt))
return 0;
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++FoldPt;
}
if (FoldPt == MBB->getFirstTerminator())
return 0;
else
++FoldPt;
// Now find the restore point.
while (FoldPt != MBB->getFirstTerminator() && !RefsInMBB.count(FoldPt)) {
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if (FoldPt->getOpcode() == TRI->getCallFrameSetupOpcode()) {
while (FoldPt != MBB->getFirstTerminator() &&
FoldPt->getOpcode() != TRI->getCallFrameDestroyOpcode()) {
if (RefsInMBB.count(FoldPt))
return 0;
++FoldPt;
}
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if (FoldPt == MBB->getFirstTerminator())
return 0;
}
++FoldPt;
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}
if (FoldPt == MBB->getFirstTerminator())
return 0;
int OpIdx = FoldPt->findRegisterUseOperandIdx(vreg, true);
if (OpIdx == -1)
return 0;
SmallVector<unsigned, 1> Ops;
Ops.push_back(OpIdx);
if (!TII->canFoldMemoryOperand(FoldPt, Ops))
return 0;
MachineInstr* FMI = TII->foldMemoryOperand(*MBB->getParent(),
FoldPt, Ops, SS);
if (FMI) {
LIs->ReplaceMachineInstrInMaps(FoldPt, FMI);
FMI = MBB->insert(MBB->erase(FoldPt), FMI);
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++NumRestoreFolds;
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}
return FMI;
}
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/// SplitRegLiveInterval - Split (spill and restore) the given live interval
/// so it would not cross the barrier that's being processed. Shrink wrap
/// (minimize) the live interval to the last uses.
bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) {
DEBUG(errs() << "Pre-alloc splitting " << LI->reg << " for " << *Barrier
<< " result: ");
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CurrLI = LI;
// Find live range where current interval cross the barrier.
LiveInterval::iterator LR =
CurrLI->FindLiveRangeContaining(BarrierIdx.getUseIndex());
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VNInfo *ValNo = LR->valno;
assert(!ValNo->isUnused() && "Val# is defined by a dead def?");
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? LIs->getInstructionFromIndex(ValNo->def) : NULL;
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// If this would create a new join point, do not split.
if (DefMI && createsNewJoin(LR, DefMI->getParent(), Barrier->getParent())) {
DEBUG(errs() << "FAILED (would create a new join point).\n");
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return false;
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// Find all references in the barrier mbb.
SmallPtrSet<MachineInstr*, 4> RefsInMBB;
for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg),
E = MRI->reg_end(); I != E; ++I) {
MachineInstr *RefMI = &*I;
if (RefMI->getParent() == BarrierMBB)
RefsInMBB.insert(RefMI);
}
// Find a point to restore the value after the barrier.
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MachineBasicBlock::iterator RestorePt =
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findRestorePoint(BarrierMBB, Barrier, LR->end, RefsInMBB, RestoreIndex);
if (RestorePt == BarrierMBB->end()) {
DEBUG(errs() << "FAILED (could not find a suitable restore point).\n");
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return false;
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if (DefMI && LIs->isReMaterializable(*LI, ValNo, DefMI))
if (Rematerialize(LI->reg, ValNo, DefMI, RestorePt,
RestoreIndex, RefsInMBB)) {
DEBUG(errs() << "success (remat).\n");
return true;
}
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// Add a spill either before the barrier or after the definition.
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MachineBasicBlock *DefMBB = DefMI ? DefMI->getParent() : NULL;
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const TargetRegisterClass *RC = MRI->getRegClass(CurrLI->reg);
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MachineInstr *SpillMI = NULL;
if (!ValNo->isDefAccurate()) {
// If we don't know where the def is we must split just before the barrier.
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if ((SpillMI = FoldSpill(LI->reg, RC, 0, Barrier,
BarrierMBB, SS, RefsInMBB))) {
SpillIndex = LIs->getInstructionIndex(SpillMI);
} else {
MachineBasicBlock::iterator SpillPt =
findSpillPoint(BarrierMBB, Barrier, NULL, RefsInMBB, SpillIndex);
if (SpillPt == BarrierMBB->begin()) {
DEBUG(errs() << "FAILED (could not find a suitable spill point).\n");
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return false; // No gap to insert spill.
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// Add spill.
SS = CreateSpillStackSlot(CurrLI->reg, RC);
TII->storeRegToStackSlot(*BarrierMBB, SpillPt, CurrLI->reg, true, SS, RC);
SpillMI = prior(SpillPt);
LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
}
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} else if (!IsAvailableInStack(DefMBB, CurrLI->reg, ValNo->def,
RestoreIndex, SpillIndex, SS)) {
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// If it's already split, just restore the value. There is no need to spill
// the def again.
if (!DefMI) {
DEBUG(errs() << "FAILED (def is dead).\n");
return false; // Def is dead. Do nothing.
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if ((SpillMI = FoldSpill(LI->reg, RC, DefMI, Barrier,
BarrierMBB, SS, RefsInMBB))) {
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SpillIndex = LIs->getInstructionIndex(SpillMI);
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} else {
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// Check if it's possible to insert a spill after the def MI.
MachineBasicBlock::iterator SpillPt;
if (DefMBB == BarrierMBB) {
// Add spill after the def and the last use before the barrier.
SpillPt = findSpillPoint(BarrierMBB, Barrier, DefMI,
RefsInMBB, SpillIndex);
if (SpillPt == DefMBB->begin()) {
DEBUG(errs() << "FAILED (could not find a suitable spill point).\n");
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return false; // No gap to insert spill.
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} else {
SpillPt = findNextEmptySlot(DefMBB, DefMI, SpillIndex);
if (SpillPt == DefMBB->end()) {
DEBUG(errs() << "FAILED (could not find a suitable spill point).\n");
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return false; // No gap to insert spill.
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}
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SS = CreateSpillStackSlot(CurrLI->reg, RC);
TII->storeRegToStackSlot(*DefMBB, SpillPt, CurrLI->reg, false, SS, RC);
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SpillMI = prior(SpillPt);
LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
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}
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}
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// Remember def instruction index to spill index mapping.
if (DefMI && SpillMI)
Def2SpillMap[ValNo->def] = SpillIndex;
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// Add restore.
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bool FoldedRestore = false;
if (MachineInstr* LMI = FoldRestore(CurrLI->reg, RC, Barrier,
BarrierMBB, SS, RefsInMBB)) {
RestorePt = LMI;
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RestoreIndex = LIs->getInstructionIndex(RestorePt);
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FoldedRestore = true;
} else {
TII->loadRegFromStackSlot(*BarrierMBB, RestorePt, CurrLI->reg, SS, RC);
MachineInstr *LoadMI = prior(RestorePt);
LIs->InsertMachineInstrInMaps(LoadMI, RestoreIndex);
}
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// Update spill stack slot live interval.
UpdateSpillSlotInterval(ValNo, SpillIndex.getUseIndex().getNextSlot(),
RestoreIndex.getDefIndex());
ReconstructLiveInterval(CurrLI);
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if (!FoldedRestore) {
SlotIndex RestoreIdx = LIs->getInstructionIndex(prior(RestorePt));
RestoreIdx = RestoreIdx.getDefIndex();
RenumberValno(CurrLI->findDefinedVNInfoForRegInt(RestoreIdx));
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}
++NumSplits;
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return true;
}
/// SplitRegLiveIntervals - Split all register live intervals that cross the
/// barrier that's being processed.
bool
PreAllocSplitting::SplitRegLiveIntervals(const TargetRegisterClass **RCs,
SmallPtrSet<LiveInterval*, 8>& Split) {
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// First find all the virtual registers whose live intervals are intercepted
// by the current barrier.
SmallVector<LiveInterval*, 8> Intervals;
for (const TargetRegisterClass **RC = RCs; *RC; ++RC) {
// FIXME: If it's not safe to move any instruction that defines the barrier
// register class, then it means there are some special dependencies which
// codegen is not modelling. Ignore these barriers for now.
if (!TII->isSafeToMoveRegClassDefs(*RC))
continue;
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std::vector<unsigned> &VRs = MRI->getRegClassVirtRegs(*RC);
for (unsigned i = 0, e = VRs.size(); i != e; ++i) {
unsigned Reg = VRs[i];
if (!LIs->hasInterval(Reg))
continue;
LiveInterval *LI = &LIs->getInterval(Reg);
if (LI->liveAt(BarrierIdx) && !Barrier->readsRegister(Reg))
// Virtual register live interval is intercepted by the barrier. We
// should split and shrink wrap its interval if possible.
Intervals.push_back(LI);
}
}
// Process the affected live intervals.
bool Change = false;
while (!Intervals.empty()) {
if (PreSplitLimit != -1 && (int)NumSplits == PreSplitLimit)
break;
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LiveInterval *LI = Intervals.back();
Intervals.pop_back();
bool result = SplitRegLiveInterval(LI);
if (result) Split.insert(LI);
Change |= result;
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}
return Change;
}
unsigned PreAllocSplitting::getNumberOfNonSpills(
SmallPtrSet<MachineInstr*, 4>& MIs,
unsigned Reg, int FrameIndex,
bool& FeedsTwoAddr) {
unsigned NonSpills = 0;
for (SmallPtrSet<MachineInstr*, 4>::iterator UI = MIs.begin(), UE = MIs.end();
UI != UE; ++UI) {
int StoreFrameIndex;
unsigned StoreVReg = TII->isStoreToStackSlot(*UI, StoreFrameIndex);
if (StoreVReg != Reg || StoreFrameIndex != FrameIndex)
NonSpills++;
int DefIdx = (*UI)->findRegisterDefOperandIdx(Reg);
if (DefIdx != -1 && (*UI)->isRegTiedToUseOperand(DefIdx))
FeedsTwoAddr = true;
return NonSpills;
/// removeDeadSpills - After doing splitting, filter through all intervals we've
/// split, and see if any of the spills are unnecessary. If so, remove them.
bool PreAllocSplitting::removeDeadSpills(SmallPtrSet<LiveInterval*, 8>& split) {
bool changed = false;
// Walk over all of the live intervals that were touched by the splitter,
// and see if we can do any DCE and/or folding.
for (SmallPtrSet<LiveInterval*, 8>::iterator LI = split.begin(),
LE = split.end(); LI != LE; ++LI) {
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DenseMap<VNInfo*, SmallPtrSet<MachineInstr*, 4> > VNUseCount;
// First, collect all the uses of the vreg, and sort them by their
// reaching definition (VNInfo).
for (MachineRegisterInfo::use_iterator UI = MRI->use_begin((*LI)->reg),
UE = MRI->use_end(); UI != UE; ++UI) {
SlotIndex index = LIs->getInstructionIndex(&*UI);
index = index.getUseIndex();
const LiveRange* LR = (*LI)->getLiveRangeContaining(index);
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VNUseCount[LR->valno].insert(&*UI);
}
// Now, take the definitions (VNInfo's) one at a time and try to DCE
// and/or fold them away.
for (LiveInterval::vni_iterator VI = (*LI)->vni_begin(),
VE = (*LI)->vni_end(); VI != VE; ++VI) {
if (DeadSplitLimit != -1 && (int)NumDeadSpills == DeadSplitLimit)
return changed;
VNInfo* CurrVN = *VI;
// We don't currently try to handle definitions with PHI kills, because
// it would involve processing more than one VNInfo at once.
// We also don't try to handle the results of PHI joins, since there's
// no defining instruction to analyze.
if (!CurrVN->isDefAccurate() || CurrVN->isUnused()) continue;
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// We're only interested in eliminating cruft introduced by the splitter,
// is of the form load-use or load-use-store. First, check that the
// definition is a load, and remember what stack slot we loaded it from.
MachineInstr* DefMI = LIs->getInstructionFromIndex(CurrVN->def);
int FrameIndex;
if (!TII->isLoadFromStackSlot(DefMI, FrameIndex)) continue;
// If the definition has no uses at all, just DCE it.
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if (VNUseCount[CurrVN].size() == 0) {
LIs->RemoveMachineInstrFromMaps(DefMI);
(*LI)->removeValNo(CurrVN);
DefMI->eraseFromParent();
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VNUseCount.erase(CurrVN);
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NumDeadSpills++;
changed = true;
// Second, get the number of non-store uses of the definition, as well as
// a flag indicating whether it feeds into a later two-address definition.
bool FeedsTwoAddr = false;
unsigned NonSpillCount = getNumberOfNonSpills(VNUseCount[CurrVN],
(*LI)->reg, FrameIndex,
FeedsTwoAddr);
// If there's one non-store use and it doesn't feed a two-addr, then
// this is a load-use-store case that we can try to fold.
if (NonSpillCount == 1 && !FeedsTwoAddr) {
// Start by finding the non-store use MachineInstr.
SmallPtrSet<MachineInstr*, 4>::iterator UI = VNUseCount[CurrVN].begin();
int StoreFrameIndex;
unsigned StoreVReg = TII->isStoreToStackSlot(*UI, StoreFrameIndex);
while (UI != VNUseCount[CurrVN].end() &&
(StoreVReg == (*LI)->reg && StoreFrameIndex == FrameIndex)) {
++UI;
if (UI != VNUseCount[CurrVN].end())
StoreVReg = TII->isStoreToStackSlot(*UI, StoreFrameIndex);
}
if (UI == VNUseCount[CurrVN].end()) continue;
MachineInstr* use = *UI;
int OpIdx = use->findRegisterUseOperandIdx((*LI)->reg, false);
if (OpIdx == -1) continue;
SmallVector<unsigned, 1> Ops;
Ops.push_back(OpIdx);
if (!TII->canFoldMemoryOperand(use, Ops)) continue;
MachineInstr* NewMI =
TII->foldMemoryOperand(*use->getParent()->getParent(),
use, Ops, FrameIndex);
if (!NewMI) continue;
LIs->RemoveMachineInstrFromMaps(DefMI);
LIs->ReplaceMachineInstrInMaps(use, NewMI);
(*LI)->removeValNo(CurrVN);
DefMI->eraseFromParent();
MachineBasicBlock* MBB = use->getParent();
NewMI = MBB->insert(MBB->erase(use), NewMI);
VNUseCount[CurrVN].erase(use);
// Remove deleted instructions. Note that we need to remove them from
// the VNInfo->use map as well, just to be safe.
for (SmallPtrSet<MachineInstr*, 4>::iterator II =
VNUseCount[CurrVN].begin(), IE = VNUseCount[CurrVN].end();
II != IE; ++II) {
for (DenseMap<VNInfo*, SmallPtrSet<MachineInstr*, 4> >::iterator
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VNI = VNUseCount.begin(), VNE = VNUseCount.end(); VNI != VNE;
++VNI)
if (VNI->first != CurrVN)
VNI->second.erase(*II);
LIs->RemoveMachineInstrFromMaps(*II);
(*II)->eraseFromParent();
}
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VNUseCount.erase(CurrVN);
for (DenseMap<VNInfo*, SmallPtrSet<MachineInstr*, 4> >::iterator
VI = VNUseCount.begin(), VE = VNUseCount.end(); VI != VE; ++VI)
if (VI->second.erase(use))
VI->second.insert(NewMI);
NumDeadSpills++;
changed = true;
continue;
}
// If there's more than one non-store instruction, we can't profitably
// fold it, so bail.
if (NonSpillCount) continue;
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// Otherwise, this is a load-store case, so DCE them.
for (SmallPtrSet<MachineInstr*, 4>::iterator UI =
VNUseCount[CurrVN].begin(), UE = VNUseCount[CurrVN].end();
UI != UE; ++UI) {
LIs->RemoveMachineInstrFromMaps(*UI);
(*UI)->eraseFromParent();
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}
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VNUseCount.erase(CurrVN);
LIs->RemoveMachineInstrFromMaps(DefMI);
(*LI)->removeValNo(CurrVN);
DefMI->eraseFromParent();
NumDeadSpills++;
changed = true;
}
}
return changed;
}
bool PreAllocSplitting::createsNewJoin(LiveRange* LR,
MachineBasicBlock* DefMBB,
MachineBasicBlock* BarrierMBB) {
if (DefMBB == BarrierMBB)
return false;
return false;
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if (LR->end < MBBEnd)
return false;
MachineLoopInfo& MLI = getAnalysis<MachineLoopInfo>();
if (MLI.getLoopFor(DefMBB) != MLI.getLoopFor(BarrierMBB))
return true;
MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>();
SmallPtrSet<MachineBasicBlock*, 4> Visited;
typedef std::pair<MachineBasicBlock*,
MachineBasicBlock::succ_iterator> ItPair;
SmallVector<ItPair, 4> Stack;
Stack.push_back(std::make_pair(BarrierMBB, BarrierMBB->succ_begin()));
while (!Stack.empty()) {
ItPair P = Stack.back();
Stack.pop_back();
MachineBasicBlock* PredMBB = P.first;
MachineBasicBlock::succ_iterator S = P.second;
if (S == PredMBB->succ_end())
continue;
else if (Visited.count(*S)) {
Stack.push_back(std::make_pair(PredMBB, ++S));
continue;
} else
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Stack.push_back(std::make_pair(PredMBB, S+1));
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MachineBasicBlock* MBB = *S;
Visited.insert(MBB);
if (MBB == BarrierMBB)
return true;
MachineDomTreeNode* DefMDTN = MDT.getNode(DefMBB);
MachineDomTreeNode* BarrierMDTN = MDT.getNode(BarrierMBB);
MachineDomTreeNode* MDTN = MDT.getNode(MBB)->getIDom();
while (MDTN) {
if (MDTN == DefMDTN)
return true;
else if (MDTN == BarrierMDTN)
break;
MDTN = MDTN->getIDom();
}
MBBEnd = LIs->getMBBEndIdx(MBB);
if (LR->end > MBBEnd)
Stack.push_back(std::make_pair(MBB, MBB->succ_begin()));
}
return false;
}
bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) {
CurrMF = &MF;
TM = &MF.getTarget();
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TRI = TM->getRegisterInfo();
TII = TM->getInstrInfo();
MFI = MF.getFrameInfo();
MRI = &MF.getRegInfo();
LIs = &getAnalysis<LiveIntervals>();
LSs = &getAnalysis<LiveStacks>();
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VRM = &getAnalysis<VirtRegMap>();
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bool MadeChange = false;
// Make sure blocks are numbered in order.
MF.RenumberBlocks();
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MachineBasicBlock *Entry = MF.begin();
SmallPtrSet<MachineBasicBlock*,16> Visited;
SmallPtrSet<LiveInterval*, 8> Split;
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for (df_ext_iterator<MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*,16> >
DFI = df_ext_begin(Entry, Visited), E = df_ext_end(Entry, Visited);
DFI != E; ++DFI) {
BarrierMBB = *DFI;
for (MachineBasicBlock::iterator I = BarrierMBB->begin(),
E = BarrierMBB->end(); I != E; ++I) {
Barrier = &*I;
const TargetRegisterClass **BarrierRCs =
Barrier->getDesc().getRegClassBarriers();
if (!BarrierRCs)
continue;
BarrierIdx = LIs->getInstructionIndex(Barrier);
MadeChange |= SplitRegLiveIntervals(BarrierRCs, Split);
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}
}
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MadeChange |= removeDeadSpills(Split);
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return MadeChange;