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Commit 8449c0d5 authored by Amaury de la Vieuville's avatar Amaury de la Vieuville
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ARM: check predicate bits for thumb instructions 

When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and
core registers, must have their predicate bit to 0b1110.

llvm-svn: 184707
parent 8175bda3
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