Skip to content
Commit 92e77502 authored by Nate Begeman's avatar Nate Begeman
Browse files

Make a new reg class for 64 bit regs that aliases the 32 bit regs. This

will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.

llvm-svn: 23803
parent 78afac2d
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment