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Commit feadc2a1 authored by Craig Topper's avatar Craig Topper
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[X86] Add test cases for missed opportunities in (x << C1) op C2 to (x op...

[X86] Add test cases for missed opportunities in (x << C1) op C2 to (x op (C2>>C1)) << C1 transform.

We handle the case where the C2 does not fit in a signed 32-bit immediate, but
(C2>>C1) does. But there's also some 64-bit opportunities when C2 is not an unsigned
32-bit immediate, but (C2>>C1) is. For OR/XOR this allows us to load the
immediate with with MOV32ri instead of a movabsq. For AND it allows us to use a
32-bit AND and fold the immediate.

llvm-svn: 357050
parent 7da7b974
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