llvm-svn: 75067

llvm-svn: 75036

Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.

llvm-svn: 75010

Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.

llvm-svn: 74731

llvm-svn: 74385

llvm-svn: 74384

Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

llvm-svn: 74329