The result vector elements are always integers.  Radar 8782191.

llvm-svn: 122112

llvm-svn: 122111

llvm-svn: 122110

interference.

llvm-svn: 122108

RegAllocBase::VerifyEnabled.

Run the machine code verifier in a few interesting places during RegAllocGreedy.

llvm-svn: 122107

The heuristics split around the largest loop where the current register may be
allocated without interference.

llvm-svn: 122106

Add vector versions of some existing scalar transforms to aid codegen in matching psign & pblend operations to the IR produced by clang/gcc for their C idioms.

llvm-svn: 122105

may be called. If the entry block is empty, the insertion point iterator will be
the "end()" value. Calling ->getParent() on it (among others) causes problems.

Modify materializeFrameBaseRegister to take the machine basic block and insert
the frame base register at the beginning of that block. (It's very similar to
what the code does all ready. The only difference is that it will always insert
at the beginning of the entry block instead of after a previous materialization
of the frame base register. I doubt that that matters here.)

<rdar://problem/8782198>

llvm-svn: 122104

BUILD_VECTOR operands where the element type is not legal.  I had previously
changed this code to insert TRUNCATE operations, but that was just wrong.

llvm-svn: 122102

The standard error handling in AsmPrinter::EmitInlineAsm handles this much
better, so just use it.

llvm-svn: 122100

llvm-svn: 122099

Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts

llvm-svn: 122098

Thumb's forced-PC-alignment requirement applies to the _total_ displacement, not just to the fragment relative
portion.  While the fragment boundary is usually already aligned, it is possible for it not to be, which 
would lead to a non-aligned final displacement.

llvm-svn: 122091

code for the case where 32-bit divide by constant is
turned into 64-bit multiply by constant.  8771012.

llvm-svn: 122090

llvm-svn: 122086

llvm-svn: 122085

the operand uses the same register as a tied operand:

  %r1 = add %r1, %r1

If add were a three-address instruction, kill flags would be required on at
least one of the uses. Since it is a two-address instruction, the tied use
operand must not have a kill flag.

This change makes the kill flag on the untied use operand optional.

llvm-svn: 122082

a partial value. rdar://8782954

llvm-svn: 122078

llvm-svn: 122077

llvm-svn: 122076

llvm-svn: 122075

llvm-svn: 122074

llvm-svn: 122073

Reapply r121905 (automatic synthesis of @llvm.sadd.with.overflow) with a fix for a bug that manifested itself
on the DragonEgg self-host bot.  Unfortunately, the testcase is pretty messy and doesn't reduce well due to
interactions with other parts of InstCombine.

llvm-svn: 122072

llvm-svn: 122070

llvm-svn: 122067

llvm-svn: 122064

llvm-svn: 122054

llvm-svn: 122053

Patch (slightly modified) by Visa Putkinen.

llvm-svn: 122052

llvm-svn: 122050

comparisons formed by comparisons.  For example,
this:

void foo(unsigned x) {
  if (x == 0 || x == 1 || x == 3 || x == 4 || x == 6) 
    bar();
}

compiles into:

_foo:                                   ## @foo
## BB#0:                                ## %entry
	cmpl	$6, %edi
	ja	LBB0_2
## BB#1:                                ## %entry
	movl	%edi, %eax
	movl	$91, %ecx
	btq	%rax, %rcx
	jb	LBB0_3

instead of:

_foo:                                   ## @foo
## BB#0:                                ## %entry
	cmpl	$2, %edi
	jb	LBB0_4
## BB#1:                                ## %switch.early.test
	cmpl	$6, %edi
	ja	LBB0_3
## BB#2:                                ## %switch.early.test
	movl	%edi, %eax
	movl	$88, %ecx
	btq	%rax, %rcx
	jb	LBB0_4

This catches a bunch of cases in GCC, which look like this:

 %804 = load i32* @which_alternative, align 4, !tbaa !0
 %805 = icmp ult i32 %804, 2
 %806 = icmp eq i32 %804, 3
 %or.cond121 = or i1 %805, %806
 %807 = icmp eq i32 %804, 4
 %or.cond124 = or i1 %or.cond121, %807
 br i1 %or.cond124, label %.thread, label %808

turning this into a range comparison.

llvm-svn: 122045

llvm-svn: 122044

IsSymbolRefDifferenceFullyResolved(). For example, we will now fold away
something like:
--
_a:
...
L0:
...
L1:
...
.long (L1 - L0) / 2
--

llvm-svn: 122043

IsSymbolRefDifferenceFullyResolved, it turns out this does change behavior on
enough cases for x86-32 that I would rather wait a bit on it.
 - In practice, we will want to change this eventually because it only means we
   generate less relocations (it also eliminates the need for the horrible
   '.set' hack that Darwin requires in some places).

llvm-svn: 122042

 - Unlike for fixups, we always do the "reliable" thing (not just for x86_64).
 - Since Darwin 'as' would typically reject things that using this will allow,
   we don't need to worry about compatibility.

llvm-svn: 122038

 - Currently just has stub implementations for Mach-O, ELF, and COFF.

llvm-svn: 122037

This is a three-way interval list intersection between a virtual register, a
live interval union, and a loop. It will be used to identify interference-free
loops for live range splitting.

llvm-svn: 122034

-- and remove FIXME asking for the same!

llvm-svn: 122032

assembler.

llvm-svn: 122031