MallocInst-autoupgrade users use non-TargetData-computed allocation sizes.
Optimization uses use TargetData to compute the allocation size.

Now that malloc calls can have constant sizes, update isArrayMallocHelper() to use TargetData to determine the size of the malloced type and the size of malloced arrays.
Extend getMallocType() to support malloc calls that have non-bitcast uses.

Update OptimizeGlobalAddressOfMalloc() to optimize malloc calls that have non-bitcast uses.  The bitcast use of a malloc call has to be treated specially here because the uses of the bitcast need to be replaced and the bitcast needs to be erased (just like the malloc call) for OptimizeGlobalAddressOfMalloc() to work correctly.

Update PerformHeapAllocSRoA() to optimize malloc calls that have non-bitcast uses.  The bitcast use of the malloc is not handled specially here because ReplaceUsesOfMallocWithGlobal replaces through the bitcast use.

Update OptimizeOnceStoredGlobal() to not care about the malloc calls' bitcast use.

Update all globalopt malloc tests to not rely on autoupgraded-MallocInsts, but instead use explicit malloc calls with correct allocation sizes.

llvm-svn: 86077

While calculating original type size for a derived type, handle type variants encoded as DIDerivedType appropriately.
This improves bitfield support.

llvm-svn: 86073

llvm-svn: 86068

Hans Wennborg!

llvm-svn: 86067

aggressive testing of dynamic stack alignment.
Note that this is off by default, and enabled for LLCBETA nightly results.

llvm-svn: 86064

llvm-svn: 86057

saved instructions even if no stack adjustment for those saves is needed.

llvm-svn: 86056

Fix DW_AT_data_member_location for bit-fields. It points to the location of annonymous field that covers respective field.

llvm-svn: 86054

llvm-svn: 86050

Handle empty/tombstone keys for LiveIndex more cleanly. Check for index sanity when constructing index list entries.

llvm-svn: 86049

not reason based on errno if NumRead has a different value.

llvm-svn: 86046

llvm-svn: 86044

llvm-svn: 86043

The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output.

With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF.

llvm-svn: 86041

resizes in IPSCCP.  This fixes PR5394.

llvm-svn: 86036

and extract_subreg as a "copy" that defines a valno.
Also fixes a typo. These two issues prevent a simple subreg coalescing from
happening before.

llvm-svn: 86022

to EmitGEPOffset.  

Implement some new transforms for optimizing 
subtracts of two pointer to ints into the same vector.  This happens
for C++ iterator idioms for example, stringmap takes a const char*
that points to the start and end of a string.  Once inlined, we want
the pointer difference to turn back into a length.

This is rdar://7362831.

llvm-svn: 86021

llvm-svn: 86019

llvm-svn: 85994

llvm-svn: 85980

This introduces a new pass, SlotIndexes, which is responsible for numbering
instructions for register allocation (and other clients). SlotIndexes numbering
is designed to match the existing scheme, so this patch should not cause any
changes in the generated code.

For consistency, and to avoid naming confusion, LiveIndex has been renamed
SlotIndex.

The processImplicitDefs method of the LiveIntervals analysis has been moved
into its own pass so that it can be run prior to SlotIndexes. This was
necessary to match the existing numbering scheme.

llvm-svn: 85979

an unconditional branch (possibly from tail merging), this code is
trying to redirect all of its predecessors to go directly to the branch
target, but that isn't feasible for indirect branches.  The other
predecessors (that don't end with indirect branches) could theoretically
still be handled, but that is not easily done right now.

The AnalyzeBranch interface doesn't currently let us distinguish jump table
branches from indirect branches, and this code is currently handling
jump tables.  To avoid punting on address-taken blocks, we would have to give
up handling jump tables.  That seems like a bad tradeoff.

llvm-svn: 85975

more aggressive an correct.  This survives building llvm in 64-bit
mode with optimizations and the built llvm passes make check.

llvm-svn: 85973

Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So it should be 22 bytes instead of 20 bytes long.

llvm-svn: 85965

llvm-svn: 85952

llvm-svn: 85947

Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.

llvm-svn: 85939

llvm-svn: 85937

Changes requested (avoid getFunction(), avoid Type creation via isVoidTy(), and avoid redundant isFreeCall cases) in feedback to r85176

llvm-svn: 85936

<rdar://problem/7352605>. When building schedule graph use mayAlias information to avoid chaining loads/stores of spill slots with non-aliased memory ops.

llvm-svn: 85934

Changes (* location in pointer variables, avoiding include, and using APInt::getLimitedValue) based on feedback to r85814

llvm-svn: 85933

functions that don't have local linkage.  Basically, we need to be more
careful about propagating argument information to functions whose results
we aren't tracking.  This fixes a miscompilation of 
LLVMCConfigurationEmitter.cpp when built with an llvm-gcc that has ipsccp
enabled.

llvm-svn: 85923

if zero bytes were read.

llvm-svn: 85922

llvm-svn: 85921

llvm-svn: 85914

llvm-svn: 85909

to follow.

llvm-svn: 85903

llvm-svn: 85896

llvm-svn: 85878

between ARM/Thumb modes and does not require the low bit of the target
address to be set for Thumb.

llvm-svn: 85874