does normal initialization and normal chaining. Change the default
AliasAnalysis implementation to NoAlias.

Update StandardCompileOpts.h and friends to explicitly request
BasicAliasAnalysis.

Update tests to explicitly request -basicaa.

llvm-svn: 116720

be more complete.  These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files.  Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added.  Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records.  More missing instructions will be coming.

llvm-svn: 116716

start for consistency.

llvm-svn: 116715

llvm-svn: 116711

The old algorithm inserted a 'rotqmbyi' instruction which was
both redundant and wrong - it made shufb select bytes from the
wrong end of the input quad.

llvm-svn: 116701

single object format can be shared.

This also adds support for

mov zed+(bar-foo), %eax

on ELF and COFF targets.

llvm-svn: 116675

llvm-svn: 116669

llvm-svn: 116666

if any floating point arguments are passed to an external function.

llvm-svn: 116665

forwarding is implemented with a load/store pair rather than a memcpy.

llvm-svn: 116637

llvm-svn: 116611

llvm-svn: 116588

llvm-svn: 116581

map.

llvm-svn: 116579

have been printed with the "S" modifier after the predicate.  With ARM's
unified syntax, they are supposed to go in the other order.  We fixed this
for Thumb when we switched to unified syntax but missed changing it for
ARM.  Apparently we don't generate these instructions often because no one
noticed until now.  Thanks to Bill Wendling for the testcase!

llvm-svn: 116563

llvm-svn: 116540

are just forms of that instruction).

llvm-svn: 116538

and let the ARMExpandPseudoInsts pass fix them up into the real (MOVs)
instruction form.

llvm-svn: 116534

pseudonym.

llvm-svn: 116512

llvm-svn: 116498

llvm-svn: 116484

llvm-svn: 116476

here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.

llvm-svn: 116471

llvm-svn: 116466

- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.

llvm-svn: 116464

llvm-svn: 116462

llvm-svn: 116461

logic to use the new APInt methods.  Among other things this
implements rdar://8501501 - llvm.smul.with.overflow.i32 should constant fold

which comes from "clang -ftrapv", originally brought to my attention from PR8221.

llvm-svn: 116457

and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.

llvm-svn: 116432

llvm-svn: 116431

llvm-svn: 116421

llvm-svn: 116412

immediates instead of 8 bits ones.

llvm-svn: 116410

8 bit constants can be used.

llvm-svn: 116403

just yet.

llvm-svn: 116386

llvm-svn: 116385

arithmetic-with-carry-in instructions.

llvm-svn: 116384

llvm-svn: 116383

llvm-svn: 116379

llvm-svn: 116376