"unterminated string" when we're performing code completion.

llvm-svn: 110933

investigated.

llvm-svn: 110917

having it finish processing all of the muliply operands before
starting the whole getAddExpr process over again, instead of
immediately after the first simplification.

llvm-svn: 110916

llvm-svn: 110915

by having it finish processing the whole operand list before
starting the whole getAddExpr process over again, instead of
immediately after the first duplicate is found.

llvm-svn: 110914

llvm-svn: 110913

llvm-svn: 110912

target triple and straightens it out.  This does less than gcc's script
config.sub, for example it turns i386-mingw32 into i386--mingw32 not
i386-pc-mingw32, but it does a decent job of turning funky triples into
something that the rest of the Triple class can understand.  The plan
is to use this to canonicalize triple's when they are first provided
by users, and have the rest of LLVM only deal with canonical triples.
Once this is done the special case workarounds in the Triple constructor
can be removed, making the class more regular and easier to use.  The
comments and unittests for the Triple class are already adjusted in this
patch appropriately for this brave new world of increased uniformity.

llvm-svn: 110909

Remove OwnershipAttr::Kind, since it's essentially redundant with attr::Kind the way it's being used. Also fix isa<OwnershipAttr> support, break more-than-80-char lines, and other miscellaneous ownership attr cleanup.

llvm-svn: 110908

llvm-svn: 110907

Fixes PR7859.

llvm-svn: 110906

in an external testsuite.

llvm-svn: 110905

llvm-svn: 110904

ExecuteCompilerInvocation in libFrontend.

llvm-svn: 110903

llvm-svn: 110902

is 8.5MB, sorry.

llvm-svn: 110901

llvm-svn: 110900

Now that we are using the Unwinder (or Jason's new unwinder when that comes about) all the plugin-specific details of getting stack frames
should be hidden behind that, and the "GetStackFrameAtIndex" and "GetStackFrameCount" algorithms become generic.  So I moved them to Thread.cpp.

llvm-svn: 110899

llvm-svn: 110898

term goal here is to be able to match enough of vector_shuffle and build_vector
so all avx intrinsics which aren't mapped to their own built-ins but to
shufflevector calls can be codegen'd. This is the first (baby) step, support
building zeroed vectors.

llvm-svn: 110897

expression.  It is now possible to do things like this:

(lldb) expr int $i = 5; $i + 1
$0 = (int) 6
(lldb) expr $i + 3
$1 = (int) 8
(lldb) expr $1 + $0
$2 = (int) 14

As a bonus, this allowed us to move printing of
expression results into the ClangPersistentVariable
class.  This code needs a bit of refactoring -- in
particular, ClangExpressionDeclMap has eaten one too
many bacteria and needs to undergo mitosis -- but the
infrastructure appears to be holding up nicely.

llvm-svn: 110896

entry for ARM STRBT is actually a super-instruction for A8.6.199 STRBT A1 & A2.
Recover by looking for ARM:USAT encoding pattern before delegating to the auto-
gened decoder.

Added a "usat" test case to arm-tests.txt.

llvm-svn: 110894

llvm-svn: 110893

llvm-svn: 110892

invalid destructor.

llvm-svn: 110891

because it could have an ambiguous suffix.

llvm-svn: 110890

instructions onto the target specific parser, which can do a better job.

llvm-svn: 110889

target specific parsers can adapt the TargetAsmParser to this.

llvm-svn: 110888

llvm-svn: 110887

if detected.
 - This is a hack, we really want the linker version at execution time, but we
   don't have any infrastructure for getting that. Yet.

llvm-svn: 110886

llvm-svn: 110885

llvm-svn: 110884

 - Review appreciated, as long as you understand that I understand that this is
   a horrible hack.

llvm-svn: 110883

Fixes a crash in a rather large and difficult-to-reduce test case.

llvm-svn: 110882

Fix a bug where child statements could not be identified as being in a CFGBlock in CFGStmtMap::getBlock.

llvm-svn: 110881

Added two test cases to arm-tests.txt.

llvm-svn: 110880

llvm-svn: 110879

Tested by scope.exp in gdb testsuite.

llvm-svn: 110876

instruction opcode.  This also fixes part of PR7792.

llvm-svn: 110875

When a register is defined by a partial load:

  %reg1234:sub_32 = MOV32mr <fi#-1>; GR64:%reg1234

That load cannot be folded into an instruction using the full 64-bit register.
It would become a 64-bit load.

This is related to the recent change to have isLoadFromStackSlot return false on
a sub-register load.

llvm-svn: 110874