llvm-svn: 110826

a register before checking if it was defined.

llvm-svn: 110733

operands. We don't currently have a hook to provide "the largest super class of
A where all registers' getSubReg(subidx) is valid and in B".

llvm-svn: 110730

llvm-svn: 110726

The live interval may be used for a spill slot as well, and that spill slot
could be shared by split registers. We cannot shrink it, even if we know the
current register won't need the spill slot in that range.

llvm-svn: 110721

llvm-svn: 110720

ARM testers.

llvm-svn: 110718

llvm-svn: 110712

When splitting a live range, the new registers have fewer uses and the
permissible register class may be less constrained. Recompute the register class
constraint from the uses of new registers created for a split. This may let them
be allocated from a larger set, possibly avoiding a spill.

llvm-svn: 110703

during live range splitting.

llvm-svn: 110686

llvm-svn: 110656

llvm-svn: 110654

llvm-svn: 110653

llvm-svn: 110652

llvm-svn: 110649

Refactor and simplify code to avoid redundant checks.

llvm-svn: 110642

register at a time. This turns out to be slightly faster than iterating over
instructions, but more importantly, it allows us to compute spill weights for
new registers created after the spill weight pass has run.

Also compute the allocation hint at the same time as the spill weight. This
allows us to use the spill weight as a cost metric for copies, and choose the
most profitable hint if there is more than one possibility.

The new hints provide a very small (< 0.1%) but universal code size improvement.

llvm-svn: 110631

pass. This pass should expand with all of the small, fine-grained optimization
passes to reduce compile time and increase happiment.

llvm-svn: 110627

llvm-svn: 110623

llvm-svn: 110621

llvm-svn: 110607

llvm-svn: 110600

llvm-svn: 110590

If we are emitting COPY instructions for the REG_SEQUENCE, make sure the kill
flag goes on the last COPY. Otherwise we may be using a killed register.

<rdar://problem/8287792>

llvm-svn: 110589

llvm-svn: 110586

relatively expensive comparison analyzer on each instruction. Also rename the
comparison analyzer method to something more in line with what it actually does.

This pass is will eventually be folded into the Machine CSE pass.

llvm-svn: 110539

out of PassManager.cpp and into Core.cpp with the rest of the C binding code.

llvm-svn: 110494

necessary.

Sometimes, live range splitting doesn't shrink the current interval, but simply
changes some instructions to use a new interval. That makes the original more
suitable for spilling. In this case, we don't need to duplicate the original.

llvm-svn: 110481

llvm-svn: 110466

llvm-svn: 110464

After heavy editing of a live interval, it is much easier to simply renumber the
live values instead of trying to keep track of the unused ones.

llvm-svn: 110463

llvm-svn: 110460

llvm-svn: 110454

llvm-svn: 110453

When a physical register is in use, some alias of that register has a live
interval with a relevant live range. That is the sad state of intervals after
physreg coalescing of subregs, and it is good enough for correct register
allocation.

llvm-svn: 110452

llvm-svn: 110429

This pass tries to remove comparison instructions when possible. For instance,
if you have this code:

   sub r1, 1
   cmp r1, 0
   bz  L1

and "sub" either sets the same flag as the "cmp" instruction or could be
converted to set the same flag, then we can eliminate the "cmp" instruction all
together. This is a important for ARM where the ALU instructions could set the
CPSR flag, but need a special suffix ('s') to do so.

llvm-svn: 110423

While emitting DBG_VALUE for registers spilled at the end of a block do not use location of MBB->end(). If a block does not have terminator then incoming iterator points to end().

llvm-svn: 110411

llvm-svn: 110410

When a joined COPY changes subreg liveness, we keep it around as a KILL,
otherwise it is safe to delete.

llvm-svn: 110403