llvm-svn: 27277

llvm-svn: 27276

llvm-svn: 27275

llvm-svn: 27274

unpromoted element type.

llvm-svn: 27273

llvm-svn: 27272

llvm-svn: 27271

llvm-svn: 27270

llvm-svn: 27269

llvm-svn: 27268

llvm-svn: 27267

directly correspond to intrinsics.

llvm-svn: 27266

llvm-svn: 27265

llvm-svn: 27264

llvm-svn: 27263

llvm-svn: 27262

llvm-svn: 27261

llvm-svn: 27260

Use pshufd, pshuhw, and pshulw to shuffle v4f32 if shufps doesn't match.
Use shufps to shuffle v4f32 if pshufd, pshuhw, and pshulw don't match.

llvm-svn: 27259

llvm-svn: 27258

llvm-svn: 27257

llvm-svn: 27256

llvm-svn: 27255

For example, packsswb actually creates a v16i8 from a pair of v8i16. But since
the intrinsic specification forces the output type to match the operands.

llvm-svn: 27254

llvm-svn: 27253

- Added SSE2 128-bit integer pack with signed saturation ops.
- Added pshufhw and pshuflw ops.

llvm-svn: 27252

llvm-svn: 27251

vector_shuffle undef.

llvm-svn: 27250

llvm-svn: 27249

integer vector logical operations would match andp{s|d} instead of pand.

llvm-svn: 27248

llvm-svn: 27247

- Whenever possible use ops of the right packed types for vector shuffles /
  splats.

llvm-svn: 27246

llvm-svn: 27245

- Other shuffle related fixes.

llvm-svn: 27244

llvm-svn: 27243

llvm-svn: 27242

Handle constantpacked vectors with constantexpr elements.

This fixes CodeGen/Generic/vector-constantexpr.ll

llvm-svn: 27241

The source operands type are v4sf with upper bits passes through.
Added matching code for these.

llvm-svn: 27240

llvm-svn: 27239

mismatch against the enum table.
This is a part of Sabre's master plan to drive me nuts with subtle bugs that
happens to only affect x86 be. :-)

llvm-svn: 27237