This method only needs to be overridden in the remote debugging case,  the
base class handles the host case.  Since we do not do remote debugging on
Linux yet and there is a typo that causes a build issue, just remove this
method for now.
 

llvm-svn: 129069

llvm-svn: 129018

Add Emulate and DumpEmulation to Instruction class.

Move InstructionLLVM out of DisassemblerLLVM class.

Add instruction emulation function calls to SBInstruction and SBInstructionList APIs.

llvm-svn: 128956

Add the rest of the mechanisms to make ARM instruction emulation usable/possible.

llvm-svn: 128907

GDBRemoteCommunicationServer classes. This involved adding a new packet
named "qSpeedTest" which can test the speed of a packet send/response pairs
using a wide variety of send/recv packet sizes.

Added a few new connection classes: one for shared memory, and one for using
mach messages (Apple only). The mach message stuff is experimental and not 
working yet, but added so I don't lose the code. The shared memory stuff
uses pretty standard calls to setup shared memory.

llvm-svn: 128837

event.

Modified the ProcessInfo structure to contain all process arguments. Using the
new function calls on MacOSX allows us to see the full process name, not just
the first 16 characters. 

Added a new platform command: "platform process info <pid> [<pid> <pid> ...]"
that can be used to get detailed information for a process including all 
arguments, user and group info and more.

llvm-svn: 128694

llvm-svn: 128685

Fix a few typos in the previous commit.

llvm-svn: 128671

Add code to emulate VLD1 (single element to all lanes) ARM instruction.

llvm-svn: 128669

Add code to emulate VST1 (single element from one lane) ARM
instruction (more floating point stores).

llvm-svn: 128661

Add code to emulate VST1 (multiple single elements) ARM
instruction (floating point store).

llvm-svn: 128656

Add code to emulate VLD1 (single element to one lane) floating point
register load instruction (ARM) .

llvm-svn: 128646

Add code to emulate VLD1 (multiple single elements) ARM instruction.

llvm-svn: 128637

Add code to emulate VSTR ARM instruction (store a floating point register).

llvm-svn: 128614

Add code to emulate the VLDR Arm instruction (load a floating poitn register).

llvm-svn: 128613

Add "Bits64" utility function.

Add code to emulate VSTM ARM instruction (store multiple floating point registers).

llvm-svn: 128609

const data, etc, and also for SBAddress objects to classify their type of
section they are in and also getting the module for a section offset address.

    lldb::SymbolType SBSymbol::GetType();
    
    lldb::SectionType SBAddress::GetSectionType ();
    lldb::SBModule SBAddress::GetModule ();

llvm-svn: 128602

Modify ARM instruction tables to allow for specifying floating point variants.

Add code to emulate VLDM ARM instruction (loading multiplt floating point registers).

Add function declarations for other floating point instructions to emulate.

llvm-svn: 128589

Fill in code for EmulateSTRDImm and EmulateSTRDReg, to emulate the
STRD (immediate) and STRD (register) instructions.

llvm-svn: 128570

class now implements the Host functionality for a lot of things that make 
sense by default so that subclasses can check:

int
PlatformSubclass::Foo ()
{
    if (IsHost())
        return Platform::Foo (); // Let the platform base class do the host specific stuff
    
    // Platform subclass specific code...
    int result = ...
    return result;
}

Added new functions to the platform:

    virtual const char *Platform::GetUserName (uint32_t uid);
    virtual const char *Platform::GetGroupName (uint32_t gid);

The user and group names are cached locally so that remote platforms can avoid
sending packets multiple times to resolve this information.

Added the parent process ID to the ProcessInfo class. 

Added a new ProcessInfoMatch class which helps us to match processes up
and changed the Host layer over to using this new class. The new class allows
us to search for processs:
1 - by name (equal to, starts with, ends with, contains, and regex)
2 - by pid
3 - And further check for parent pid == value, uid == value, gid == value, 
    euid == value, egid == value, arch == value, parent == value.
    
This is all hookup up to the "platform process list" command which required
adding dumping routines to dump process information. If the Host class 
implements the process lookup routines, you can now lists processes on 
your local machine:

machine1.foo.com % lldb
(lldb) platform process list 
PID    PARENT USER       GROUP      EFF USER   EFF GROUP  TRIPLE                   NAME
====== ====== ========== ========== ========== ========== ======================== ============================
99538  1      username   usergroup  username   usergroup  x86_64-apple-darwin      FileMerge
94943  1      username   usergroup  username   usergroup  x86_64-apple-darwin      mdworker
94852  244    username   usergroup  username   usergroup  x86_64-apple-darwin      Safari
94727  244    username   usergroup  username   usergroup  x86_64-apple-darwin      Xcode
92742  92710  username   usergroup  username   usergroup  i386-apple-darwin        debugserver


This of course also works remotely with the lldb-platform:

machine1.foo.com % lldb-platform --listen 1234

machine2.foo.com % lldb
(lldb) platform create remote-macosx
  Platform: remote-macosx
 Connected: no
(lldb) platform connect connect://localhost:1444
  Platform: remote-macosx
    Triple: x86_64-apple-darwin
OS Version: 10.6.7 (10J869)
    Kernel: Darwin Kernel Version 10.7.0: Sat Jan 29 15:17:16 PST 2011; root:xnu-1504.9.37~1/RELEASE_I386
  Hostname: machine1.foo.com
 Connected: yes
(lldb) platform process list 
PID    PARENT USER       GROUP      EFF USER   EFF GROUP  TRIPLE                   NAME
====== ====== ========== ========== ========== ========== ======================== ============================
99556  244    username   usergroup  username   usergroup  x86_64-apple-darwin      trustevaluation
99548  65539  username   usergroup  username   usergroup  x86_64-apple-darwin      lldb
99538  1      username   usergroup  username   usergroup  x86_64-apple-darwin      FileMerge
94943  1      username   usergroup  username   usergroup  x86_64-apple-darwin      mdworker
94852  244    username   usergroup  username   usergroup  x86_64-apple-darwin      Safari

The lldb-platform implements everything with the Host:: layer, so this should
"just work" for linux. I will probably be adding more stuff to the Host layer
for launching processes and attaching to processes so that this support should
eventually just work as well.

Modified the target to be able to be created with an architecture that differs
from the main executable. This is needed for iOS debugging since we can have
an "armv6" binary which can run on an "armv7" machine, so we want to be able
to do:

% lldb
(lldb) platform create remote-ios
(lldb) file --arch armv7 a.out

Where "a.out" is an armv6 executable. The platform then can correctly decide
to open all "armv7" images for all dependent shared libraries.

Modified the disassembly to show the current PC value. Example output:

(lldb) disassemble --frame
a.out`main:
   0x1eb7:  pushl  %ebp
   0x1eb8:  movl   %esp, %ebp
   0x1eba:  pushl  %ebx
   0x1ebb:  subl   $20, %esp
   0x1ebe:  calll  0x1ec3                   ; main + 12 at test.c:18
   0x1ec3:  popl   %ebx
-> 0x1ec4:  calll  0x1f12                   ; getpid
   0x1ec9:  movl   %eax, 4(%esp)
   0x1ecd:  leal   199(%ebx), %eax
   0x1ed3:  movl   %eax, (%esp)
   0x1ed6:  calll  0x1f18                   ; printf
   0x1edb:  leal   213(%ebx), %eax
   0x1ee1:  movl   %eax, (%esp)
   0x1ee4:  calll  0x1f1e                   ; puts
   0x1ee9:  calll  0x1f0c                   ; getchar
   0x1eee:  movl   $20, (%esp)
   0x1ef5:  calll  0x1e6a                   ; sleep_loop at test.c:6
   0x1efa:  movl   $12, %eax
   0x1eff:  addl   $20, %esp
   0x1f02:  popl   %ebx
   0x1f03:  leave
   0x1f04:  ret
   
This can be handy when dealing with the new --line options that was recently
added:

(lldb) disassemble --line
a.out`main + 13 at test.c:19
   18  	{
-> 19  		printf("Process: %i\n\n", getpid());
   20  	    puts("Press any key to continue..."); getchar();
-> 0x1ec4:  calll  0x1f12                   ; getpid
   0x1ec9:  movl   %eax, 4(%esp)
   0x1ecd:  leal   199(%ebx), %eax
   0x1ed3:  movl   %eax, (%esp)
   0x1ed6:  calll  0x1f18                   ; printf

Modified the ModuleList to have a lookup based solely on a UUID. Since the
UUID is typically the MD5 checksum of a binary image, there is no need
to give the path and architecture when searching for a pre-existing
image in an image list.

Now that we support remote debugging a bit better, our lldb_private::Module
needs to be able to track what the original path for file was as the platform
knows it, as well as where the file is locally. The module has the two 
following functions to retrieve both paths:

const FileSpec &Module::GetFileSpec () const;
const FileSpec &Module::GetPlatformFileSpec () const;

llvm-svn: 128563

Fill in EmulateLDRDRegister to emulate LDRD (register) instruction.

Remove stubs for functions not-to-be-implemented at the moment.

llvm-svn: 128559

Fill in EmulateLDRLImmediate to emulate the LDRD (immediate) ARM instruction.

llvm-svn: 128556

    
Using the new synthetic symbols generated by ObjectFileELF, have the Linux
dynamic loader plugin generate a thread plan that will take us thru a PLT entry
to the corresponding target function.

llvm-svn: 128552

    
When populating symbol tables ObjectFileELF now generates a set of synthetic
trampoline symbols.  These new symbols correspond to entries in the program
linkage table and have a (possibly mangled) name identifying the corresponding
symbol in some DSO.  These symbols will be used by the DynamicLoader loader
plugin on Linux to provide thread plans when execution flows from one DSO to
another.

llvm-svn: 128550

Fix typo in previous check-in.

llvm-svn: 128549

llvm-svn: 128548

linux: initial support for 'real' signal handling

This patch upgrades the Linux process plugin to handle a larger range of signal
events.  For example, we can detect when the inferior has "crashed" and why,
interrupt a running process, deliver an arbitrary signal, and so on.

llvm-svn: 128547

Fill in EmulateSTRImmARM to emulate the STR (immediate,ARM) instruction.

llvm-svn: 128528

Fill in EmulateSTRBImmARM to emulate the STRB (immediate, ARM) instruction.

llvm-svn: 128527

Fill in EmulateSTREX to emulate the STREX ARM instruction.

llvm-svn: 128525

current time instead.

llvm-svn: 128514

Fill in code in EmulateSUBReg to emulate the SUB (register) ARM instruction.

llvm-svn: 128508

Fill in code in EmulateADDRegShift, to emulate the ADD
(register-shifted register) ARM instruction.

llvm-svn: 128500

Can't just call "rand" to get a random port, 'cause then you'll get the same sequence in two lldb's.  This makes running lldb on lldb not work very well.  

llvm-svn: 128493

Add subtraction context.

Add code to emulate SUB (SP minus register) ARM instruction.

Add stubs for other ARM emulation functions that need to be written.

llvm-svn: 128491

Add missing encodings for EmulateMOVRdImm  (MOV register) function.

llvm-svn: 128479

Fix bugs in various ARM istruction emulation functions:

EmulateVPUSH
   - Fix context.
   - Fix bug calculating register numbers.

EmulateVPOP
   - Fix context.
   - Fix bug calculating register numbers.

EmulateShiftIMM
   - Fix bug in assert statement.

EmulateLDMDA
   - Fix context.

EmulateLDMDB
   - Fix context.

EmulateLDMIB
   - Fix context.     

EmulateSTM
   - Fix bug calculating lowest_set_bit.     

EmulateSTMDA
   - Fix context.
   - Fix bug calculating lowest_set_bit.

EmulateSTMDB
   - Fix context.
   - Fix bug calculating lowest_set_bit.

EmulateSTMIB
   - FIx context     

EmulateLDRSBImmed
   - Fix test to match correction in corrected manual 

llvm-svn: 128409

an architecture into ArchSpec:

uint32_t
ArchSpec::GetMinimumOpcodeByteSize() const;

uint32_t
ArchSpec::GetMaximumOpcodeByteSize() const;

Added an AddressClass to the Instruction class in Disassembler.h.
This allows decoded instructions to know know if they are code,
code with alternate ISA (thumb), or even data which can be mixed
into code. The instruction does have an address, but it is a good
idea to cache this value so we don't have to look it up more than 
once.

Fixed an issue in Opcode::SetOpcodeBytes() where the length wasn't
getting set.

Changed:

	bool
	SymbolContextList::AppendIfUnique (const SymbolContext& sc);

To:
	bool
	SymbolContextList::AppendIfUnique (const SymbolContext& sc, 
									   bool merge_symbol_into_function);

This function was typically being used when looking up functions
and symbols. Now if you lookup a function, then find the symbol,
they can be merged into the same symbol context and not cause
multiple symbol contexts to appear in a symbol context list that
describes the same function.

Fixed the SymbolContext not equal operator which was causing mixed
mode disassembly to not work ("disassembler --mixed --name main").

Modified the disassembler classes to know about the fact we know,
for a given architecture, what the min and max opcode byte sizes
are. The InstructionList class was modified to return the max
opcode byte size for all of the instructions in its list.
These two fixes means when disassemble a list of instructions and dump 
them and show the opcode bytes, we can format the output more 
intelligently when showing opcode bytes. This affects any architectures
that have varying opcode byte sizes (x86_64 and i386). Knowing the max
opcode byte size also helps us to be able to disassemble N instructions
without having to re-read data if we didn't read enough bytes.

Added the ability to set the architecture for the disassemble command.
This means you can easily cross disassemble data for any supported 
architecture. I also added the ability to specify "thumb" as an 
architecture so that we can force disassembly into thumb mode when
needed. In GDB this was done using a hack of specifying an odd
address when disassembling. I don't want to repeat this hack in LLDB,
so the auto detection between ARM and thumb is failing, just specify
thumb when disassembling:

(lldb) disassemble --arch thumb --name main

You can also have data in say an x86_64 file executable and disassemble
data as any other supported architecture:
% lldb a.out
Current executable set to 'a.out' (x86_64).
(lldb) b main
(lldb) run
(lldb) disassemble --arch thumb --count 2 --start-address 0x0000000100001080 --bytes
0x100001080:  0xb580 push   {r7, lr}
0x100001082:  0xaf00 add    r7, sp, #0

Fixed Target::ReadMemory(...) to be able to deal with Address argument object
that isn't section offset. When an address object was supplied that was
out on the heap or stack, target read memory would fail. Disassembly uses
Target::ReadMemory(...), and the example above where we disassembler thumb
opcodes in an x86 binary was failing do to this bug.

llvm-svn: 128347

llvm-svn: 128313

llvm-svn: 128312