using cpValue2Value instead of
passing vector to createCopyInstructionByType.

llvm-svn: 1272

since some m. instr. may be generated by LLVM instrs. in other blocks.
Handle non-SSA (anti and output) edges and true edges uniformly by
working with machine instructions alone.

llvm-svn: 1269

llvm-svn: 1264

llvm-svn: 1263

LLVM instruction is no longer recorded in each node, but BB is.

llvm-svn: 1262

llvm-svn: 1261

computing size of extra outgoing args.

llvm-svn: 1256

This wasn't a problem until we started putting copies for Phi values
that produced cycles in the SchedGraph!

llvm-svn: 1254

llvm-svn: 1253

regClass since FP class has two reg Types.

llvm-svn: 1236

llvm-svn: 1235

Much nicer.

llvm-svn: 1223

llvm-svn: 1217

llvm-svn: 1212

llvm-svn: 1207

are now found as part of the initial walk of the machine code).
Also memory load/store instructions can be generated for non-memory
LLVM instructions, which wasn't handled before.  It is now.

llvm-svn: 1199

llvm-svn: 1198

llvm-svn: 1187

directly to manage stack frame.

llvm-svn: 1186

llvm-svn: 1185

is already pushed to stack by a previous call to the same method.

llvm-svn: 1154

llvm-svn: 1147

Avoids having to handle some special cases that cause complex interactions
with instr. selection.

llvm-svn: 1138

llvm-svn: 1137

llvm-svn: 1119

IGNode::pushOnStack().

llvm-svn: 1116

llvm-svn: 1112

llvm-svn: 1108

Moved InsertCallerSaveInstr to the SparcRegInfo.cpp

llvm-svn: 1106

llvm-svn: 1010

support, e.g., dependences on Call instructions.

llvm-svn: 1009

(b) any instructions that use or set CC registers.  Whether or not the
latter are needed really should be machine-dependent.

llvm-svn: 1008

llvm-svn: 992

we need to handle %ccr reg in a special way.

llvm-svn: 990

llvm-svn: 968

llvm-svn: 967

llvm-svn: 948

llvm-svn: 947

llvm-svn: 946

useful instructions already inserted into delay slots.

llvm-svn: 945