llvm-svn: 50600

llvm-svn: 50591

llvm-svn: 50586

llvm-svn: 50582

llvm-svn: 50564

from x86-64 calling convention work.

llvm-svn: 50545

fixes the 254.gap regression on x86 and the 403.gcc regression on x86-64.

llvm-svn: 50537

2) Return NULL instead of false in several places for tidiness.
3) fix a bug optimizing  sprintf(p, "%c", x)

llvm-svn: 50521

a FunctionPass.  This makes it simpler, fixes dozens of bugs, adds
a couple of minor features, and shrinks is considerably: from
2214 to 1437 lines.

llvm-svn: 50520

llvm-svn: 50473

to instcombine.

llvm-svn: 50472

Revert r50441.  The original code was correct.  Add some more comments so that I don't make the same mistake in the future.

llvm-svn: 50446

we were checking for it in the wrong order.  This caused a miscompilation because the
return slot optimization assumes that the call it is dealing with is NOT a memcpy.

llvm-svn: 50444

llvm-svn: 50442

of this was suggested by Chris.

llvm-svn: 50441

llvm-svn: 50437

llvm-svn: 50436

This fixes the second half of PR2262

llvm-svn: 50430

llvm-svn: 50428

llvm-svn: 50406

llvm-svn: 50390

llvm-svn: 50384

llvm-svn: 50383

the trip count.

llvm-svn: 50382

llvm-svn: 50370

ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach
SelectionDAG's ComputeMaskedBits what InstCombine's knows
about SRem. And teach them both some things about high bits
in Mul, UDiv, URem, and Sub. This allows instcombine and
dagcombine to eliminate sign-extension operations in
several new cases.

llvm-svn: 50358

When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible.  This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:

void test () {
  asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}

Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.

Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??

Incidentally, this was the todo in 
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll

Please do NOT pull this into Tak.

llvm-svn: 50315

llvm-svn: 50313

llvm-svn: 50300

to the block that defines their operands. This doesn't work in the
case that the operand is an invoke, because invoke is a terminator
and must be the last instruction in a block.

Replace it with support in SelectionDAGISel for copying struct values
into sequences of virtual registers.

llvm-svn: 50279

r48047 r48084 r48085 r48086 r48088 r48096 r48099 r48109 and r48123.

llvm-svn: 50265

goes back to the block, e.g.:

  Threading edge through bool from 'bb37.us.thread3829' to 'bb37.us' with cost: 1, across block:

bb37.us:		; preds = %bb37.us.thread3829, %bb37.us, %bb33
	%D1361.1.us = phi i32 [ %tmp36, %bb33 ], [ %D1361.1.us, %bb37.us ], [ 0, %bb37.us.thread3829 ]		; <i32> [#uses=2]
	%tmp39.us = icmp eq i32 %D1361.1.us, 0		; <i1> [#uses=1]
	br i1 %tmp39.us, label %bb37.us, label %bb42.us

llvm-svn: 50251

llvm-svn: 50203

sccp tracks getresult values, not call values in this
case.

llvm-svn: 50202

llvm-svn: 50201

llvm-svn: 50174

would turn every getresult instruction into undef.  This helps with
rdar://5778210

llvm-svn: 50140

type of a different size.

llvm-svn: 50121

Don't do: "(X & 4) >> 1 == 2  --> (X & 4) == 4" if there are more than one uses of the shift result.

llvm-svn: 50118

where a comparison has a phi input and that phi is a constant.  For example,
stuff like:

  Threading edge through bool from 'bb2149' to 'bb2231' with cost: 1, across block:
bb2237:		; preds = %bb2231, %bb2149
	%tmp2328.rle = phi i32 [ %tmp2232, %bb2231 ], [ %tmp2232439, %bb2149 ]		; <i32> [#uses=2]
	%done.0 = phi i32 [ %done.2, %bb2231 ], [ 0, %bb2149 ]		; <i32> [#uses=1]
	%tmp2239 = icmp eq i32 %done.0, 0		; <i1> [#uses=1]
	br i1 %tmp2239, label %bb2231, label %bb2327

or

bb38.i298:		; preds = %bb33.i295, %bb1693
	%tmp39.i296.rle = phi %struct.ibox* [ null, %bb1693 ], [ %tmp39.i296.rle1109, %bb33.i295 ]		; <%struct.ibox*> [#uses=2]
	%minspan.1.i291.reg2mem.1 = phi i32 [ 32000, %bb1693 ], [ %minspan.0.i288, %bb33.i295 ]		; <i32> [#uses=1]
	%tmp40.i297 = icmp eq %struct.ibox* %tmp39.i296.rle, null		; <i1> [#uses=1]
	br i1 %tmp40.i297, label %implfeeds.exit311, label %bb43.i301

This triggers thousands of times in spec.

llvm-svn: 50110