isReg, etc., from isRegister, etc.

llvm-svn: 57006

can be used when deciding if a block can transfer control to another
via a fall-through instead of a branch.

llvm-svn: 56968

isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189

a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.

Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.

Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.

llvm-svn: 54146

Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.

llvm-svn: 53746

MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212

llvm-svn: 50663

- Do not iterate over SmallPtrSet, the order of iteration is not deterministic.

llvm-svn: 50209

llvm-svn: 47703

llvm-svn: 47629

would have been a Godsend here!

llvm-svn: 47625

llvm-svn: 46930

llvm-svn: 45697

Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695

that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674

operands.  The lists are currently kept in MachineRegisterInfo, but it does
not yet provide an iterator interface to them.

llvm-svn: 45477

llvm-svn: 45469

e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464

llvm-svn: 45418

of comparing begin() and end().

llvm-svn: 42585

llvm-svn: 41676

_GLIBCXX_DEBUG.

llvm-svn: 37793

llvm-svn: 37633

llvm-svn: 37408

llvm-svn: 37190

llvm-svn: 36600

llvm-svn: 35040

llvm-svn: 34428

Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399

llvm-svn: 34381

llvm-svn: 34111

llvm-svn: 32622

llvm-svn: 32617

llvm-svn: 32321

of opcode and number of operands.

llvm-svn: 31947

llvm-svn: 31857

llvm-svn: 31145

print the LLVM BB label.

llvm-svn: 30775

instructions.

llvm-svn: 30760

llvm-svn: 30708