llvm-svn: 45673

Some day I'll get it all moved over...

llvm-svn: 45672

llvm-svn: 45671

ShadowStackCollector, which additionally has reduced overhead with
no sacrifice in portability.

Considering a function @fun with 8 loop-local roots,
ShadowStackCollector introduces the following overhead
(x86):

; shadowstack prologue
        movl    L_llvm_gc_root_chain$non_lazy_ptr, %eax
        movl    (%eax), %ecx
        movl    $___gc_fun, 20(%esp)
        movl    $0, 24(%esp)
        movl    $0, 28(%esp)
        movl    $0, 32(%esp)
        movl    $0, 36(%esp)
        movl    $0, 40(%esp)
        movl    $0, 44(%esp)
        movl    $0, 48(%esp)
        movl    $0, 52(%esp)
        movl    %ecx, 16(%esp)
        leal    16(%esp), %ecx
        movl    %ecx, (%eax)

; shadowstack loop overhead
        (none)

; shadowstack epilogue
        movl    48(%esp), %edx
        movl    %edx, (%ecx)

; shadowstack metadata
        .align  3
___gc_fun:                              # __gc_fun
        .long   8
        .space  4

In comparison to LowerGC:

; lowergc prologue
        movl    L_llvm_gc_root_chain$non_lazy_ptr, %eax
        movl    (%eax), %ecx
        movl    %ecx, 48(%esp)
        movl    $8, 52(%esp)
        movl    $0, 60(%esp)
        movl    $0, 56(%esp)
        movl    $0, 68(%esp)
        movl    $0, 64(%esp)
        movl    $0, 76(%esp)
        movl    $0, 72(%esp)
        movl    $0, 84(%esp)
        movl    $0, 80(%esp)
        movl    $0, 92(%esp)
        movl    $0, 88(%esp)
        movl    $0, 100(%esp)
        movl    $0, 96(%esp)
        movl    $0, 108(%esp)
        movl    $0, 104(%esp)
        movl    $0, 116(%esp)
        movl    $0, 112(%esp)

; lowergc loop overhead
        leal    44(%esp), %eax
        movl    %eax, 56(%esp)
        leal    40(%esp), %eax
        movl    %eax, 64(%esp)
        leal    36(%esp), %eax
        movl    %eax, 72(%esp)
        leal    32(%esp), %eax
        movl    %eax, 80(%esp)
        leal    28(%esp), %eax
        movl    %eax, 88(%esp)
        leal    24(%esp), %eax
        movl    %eax, 96(%esp)
        leal    20(%esp), %eax
        movl    %eax, 104(%esp)
        leal    16(%esp), %eax
        movl    %eax, 112(%esp)

; lowergc epilogue
        movl    48(%esp), %edx
        movl    %edx, (%ecx)

; lowergc metadata
        (none)

llvm-svn: 45670

up to the various compiler pipelines.

This doesn't actually add support for any GC algorithms, which means it 
temporarily breaks a few tests. To be fixed shortly.

llvm-svn: 45669

llvm-svn: 45668

llvm-svn: 45667

llvm-svn: 45666

llvm-svn: 45665

pretty print the type name for void.

llvm-svn: 45664

fiends. Change Makefile.ocaml to not touch CFLAGS.

llvm-svn: 45663

llvm-svn: 45662

llvm-svn: 45661

llvm-svn: 45660

llvm-svn: 45659

direct calls bails out unless caller and callee have essentially
equivalent parameter attributes.  This is illogical - the callee's
attributes should be of no relevance here.  Rework the logic, which
incidentally fixes a crash when removed arguments have attributes.

llvm-svn: 45658

a direct call with cast parameters and cast return
value (if any), instcombine was prepared to cast any
non-void return value into any other, whether castable
or not.  Add a new predicate for testing whether casting
is valid, and check it both for the return value and
(as a cleanup) for the parameters.

llvm-svn: 45657

llvm-svn: 45656

llvm-svn: 45655

instead of "ISD::STORE".  This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores).  This allows us to remove
more explicit isStore flags from the .td files.

Finally, add a warning for when a .td file contains an explicit 
isStore and tblgen is able to infer it.

llvm-svn: 45654

llvm-svn: 45653

llvm-svn: 45652

No functionality change. 

llvm-svn: 45651

intrinsic that writes to memory.

llvm-svn: 45650

llvm-svn: 45649

occured in a pattern, but failed miserably.  The new code works for
any instruction that has a store in its pattern, including all the 
x86 mem op mem instructions.

The only target-independent code that uses this is branch folding,
so this won't change anything in practice.

llvm-svn: 45648

rearrange some code to allow inferring instr info from the pattern of the instr, but don't do so yet.

llvm-svn: 45647

llvm-svn: 45646

llvm-svn: 45645

llvm-svn: 45644

llvm-svn: 45643

llvm-svn: 45642

llvm-svn: 45641

llvm-svn: 45640

llvm-svn: 45639

llvm-svn: 45638

llvm-svn: 45637

out, DAGISelEmitter can compute it in its ctor, which simplifies some code.

Now we can use CodegenDAGPatterns in other parts of tblgen that want access
to dag pattern info, woo!

llvm-svn: 45636

The only difference in output is that we now print them in alphabetical 
order instead of reverse alphabetical order.

llvm-svn: 45635

llvm-svn: 45634