class which represents the XCore cp/dp section flags.  No functionality
change yet.

llvm-svn: 79077

"the current basic block".

llvm-svn: 79069

llvm-svn: 79067

the register save area if %al is 0. This avoids touching xmm
regsiters when they aren't actually used.

llvm-svn: 79061

llvm-svn: 79039

libcall. Take advantage of this in the ARM backend to rectify broken
choice of CC when hard float is in effect. PIC16 may want to see if
it could be of use in MakePIC16Libcall, which works unchanged.

Patch by Sandeep!

llvm-svn: 79033

llvm-svn: 79032

llvm-svn: 79030

llvm-svn: 79026

llvm-svn: 79024

llvm-svn: 79022

llvm-svn: 79015

llvm-svn: 79014

llvm-svn: 79012

llvm-svn: 79009

as well as the StringRef change.

llvm-svn: 79006

implemented so far) are recognized during legalization, it is easy to fall
back to the default expansion for other shuffles.

llvm-svn: 78995

scalar_to_vector.  Generate these VDUP nodes during legalization instead
of trying to recognize the pattern during selection.

llvm-svn: 78994

target-specific VDUPLANE nodes.  This allows the subreg handling for the
quad-register version to be done easily with Pats in the .td file, instead
of with custom code in ARMISelDAGToDAG.cpp.

llvm-svn: 78993

specific printer (this only works on x86, for now).
 - This makes it possible to do some correctness checking of the parsing and
   matching, since we can compare the results of 'as' on the original input, to
   those of 'as' on the output from llvm-mc.

 - In theory, we could now have an easy ATT -> Intel syntax converter. :)

llvm-svn: 78986

to print one instruction.

llvm-svn: 78985

llvm-svn: 78984

llvm-svn: 78970

llvm-svn: 78968

accidentally match unrelated things.

llvm-svn: 78966

AsmPrinter instance (instead of just a FunctionPass)

llvm-svn: 78962

must be emitted for PowerPC-Linux '.bss' section

llvm-svn: 78958

llvm-svn: 78948

TargetAsmInfo. This eliminates a dependency on TargetMachine.h from
TargetRegistry.h, which technically was a layering violation.
 - Clients probably can only sensibly pass in the same TargetAsmInfo as the
   TargetMachine has, but there are only limited clients of this API.

llvm-svn: 78928

llvm-svn: 78921

x86_64-apple-darwin10.

--- Reverse-merging r78895 into '.':
U    test/CodeGen/PowerPC/2008-12-12-EH.ll
U    lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U    include/llvm/Target/DarwinTargetAsmInfo.h
U    lib/Target/X86/X86TargetAsmInfo.cpp
U    lib/Target/X86/X86TargetAsmInfo.h
U    lib/Target/ARM/ARMTargetAsmInfo.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/ARMTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.h
U    lib/Target/PowerPC/PPCTargetMachine.cpp
G    lib/Target/DarwinTargetAsmInfo.cpp

llvm-svn: 78919

llvm-svn: 78918

llvm-svn: 78917

llvm-svn: 78916

Remove CooperTargetMachine, as currently only one is supported.

llvm-svn: 78914

llvm-svn: 78908

llvm-svn: 78905

llvm-svn: 78904

implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.

llvm-svn: 78900

llvm-svn: 78898