Commits · 1094ded6f3772ce1ec8c131313f686f9668f4978 · Roger Ferrer / llvm-epi-0.8

Nov 11, 2011
- Nuke no longer accurate comment. · b68eeb38
  Jim Grosbach authored Nov 11, 2011
```
llvm-svn: 144411
```
  b68eeb38
- Preserve MachineMemOperands in ARMLoadStoreOptimizer. · 28c1d184
  Andrew Trick authored Nov 11, 2011
```
Fixes PR8113.

llvm-svn: 144409
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  28c1d184
- ARM allow Q registers in vldm/vstm register lists. · 85a2343b
  Jim Grosbach authored Nov 11, 2011
```
rdar://9672822

llvm-svn: 144407
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  85a2343b
- Add a custom safepoint method, in order for language implementers to decide... · 26c328d7
  Nicolas Geoffray authored Nov 11, 2011
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Add a custom safepoint method, in order for language implementers to decide which machine instruction gets to be a safepoint.

llvm-svn: 144399
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  26c328d7
- Remove FIXME comment that should have been removed with r144351. · c391f7ff
  Bob Wilson authored Nov 11, 2011
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llvm-svn: 144392
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  c391f7ff
- allow non-device function calls in PTX when natively handling device-side printf · 089cc532
  Dan Bailey authored Nov 11, 2011
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llvm-svn: 144388
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  089cc532
- add rules in tabgen for PTX COPY_ADDRESS of frameindex · 80cd65bf
  Dan Bailey authored Nov 11, 2011
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llvm-svn: 144387
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  80cd65bf
- Clients are responsible for initializing the targets, remove it from the disassembler API. · f554228d
  Benjamin Kramer authored Nov 11, 2011
```
This will break users of the LLVMCreateDisasm API (not that I know of any). They have to call the 
LLVMInitializeAll* functions from llvm-c/Target.h themselves now. edis' C API in all its horribleness 
should be unaffected.

llvm-svn: 144385
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  f554228d
- Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler. · 48b5bbff
  Benjamin Kramer authored Nov 11, 2011
```
llvm-svn: 144384
```
  48b5bbff
- Remove the unnecessary dependency on libMBlazeCodeGen from libMBlazeDisassembler. · 1cc805c0
  Benjamin Kramer authored Nov 11, 2011
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llvm-svn: 144383
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  1cc805c0
- Add lowering for AVX2 shift instructions. · ea28a34c
  Craig Topper authored Nov 11, 2011
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llvm-svn: 144380
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  ea28a34c
- Rename variables to avoid confusion. No functionallity change intended. · e19b0a9e
  Chad Rosier authored Nov 11, 2011
```
llvm-svn: 144377
```
  e19b0a9e
- Add support for using immediates with select instructions. · 7ddd63ce
  Chad Rosier authored Nov 11, 2011
```
rdar://10412592

llvm-svn: 144376
```
  7ddd63ce
- Do not try to detect DAG combine patterns for integer multiply-add/sub if value · 4a63d1c0
  Akira Hatanaka authored Nov 11, 2011
```
type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.

llvm-svn: 144373
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  4a63d1c0
- 64-bit atomic instructions. · 21cbc25b
  Akira Hatanaka authored Nov 11, 2011
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llvm-svn: 144372
```
  21cbc25b
- Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64. · 9189d712
  Akira Hatanaka authored Nov 11, 2011
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llvm-svn: 144371
```
  9189d712
- Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC. · 4bdfec57
  Akira Hatanaka authored Nov 11, 2011
```
llvm-svn: 144370
```
  4bdfec57
- 64-bit versions of jal, jalr and bal. · 0009dc20
  Akira Hatanaka authored Nov 11, 2011
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llvm-svn: 144368
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  0009dc20
- Emit Mips64's sequence of instructions that set global register in prologue. · 11521863
  Akira Hatanaka authored Nov 11, 2011
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llvm-svn: 144367
```
  11521863
- Fix printing of MCSymbolRegExpr. Needs three closing parentheses for · aa1f4c79
  Akira Hatanaka authored Nov 11, 2011
```
VK_Mips_GPOFF_HI/LO.

llvm-svn: 144366
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  aa1f4c79
- Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3. · c4a00147
  Eli Friedman authored Nov 11, 2011
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llvm-svn: 144361
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  c4a00147
- Initialize variable. · 0a917b7a
  Eric Christopher authored Nov 11, 2011
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llvm-svn: 144360
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  0a917b7a
- When loading a value, treat an i1 as an i8. · 023ede56
  Chad Rosier authored Nov 11, 2011
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llvm-svn: 144356
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  023ede56
- If we have a DIE with an AT_specification use that instead of the normal · c12c211c
  Eric Christopher authored Nov 11, 2011
```
addr DIE when adding to the dwarf accelerator tables.

llvm-svn: 144354
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  c12c211c
- Get rid of an optimization in SCCP which appears to have many issues. ... · 0a309292
  Eli Friedman authored Nov 11, 2011
```
Get rid of an optimization in SCCP which appears to have many issues.  Specifically, it doesn't handle many cases involving undef correctly, and it is missing other checks which
lead to it trying to re-mark a value marked as a constant with a different value.  It also appears to trigger very rarely.

Fixes PR11357.

llvm-svn: 144352
```
  0a309292
- Reenable compact unwinding now that <rdar://problem/10430076> is fixed. · 70976ad9
  Bill Wendling authored Nov 11, 2011
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llvm-svn: 144351
```
  70976ad9
- If we have to reset the calculation of the compact encoding, then also reset the · 8df82045
  Bill Wendling authored Nov 11, 2011
```
"saved register" index.
<rdar://problem/10430076>

llvm-svn: 144350
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  8df82045
- Add support for using MVN to materialize negative constants. · 2a3503e0
  Chad Rosier authored Nov 11, 2011
```
rdar://10412592

llvm-svn: 144348
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  2a3503e0
- Disable compact unwind generation until I can solve the codegen problems. · f311655e
  Bill Wendling authored Nov 11, 2011
```
llvm-svn: 144346
```
  f311655e
- LLVMBuild: Add explicit information on whether targets define an assembly... · 6d617b48
  Daniel Dunbar authored Nov 11, 2011
```
LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.

llvm-svn: 144344
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  6d617b48
- Thumb2 ldm/stm updating w/ one register in the list are LDR/STR. · d9a9be26
  Jim Grosbach authored Nov 10, 2011
```
rdar://10429490

llvm-svn: 144338
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  d9a9be26
- ARM let processInstruction() tranforms chain. · afad0531
  Jim Grosbach authored Nov 10, 2011
```
llvm-svn: 144337
```
  afad0531
- Thumb2 parsing for push/pop w/ hi registers in the reglist. · 9bded9dc
  Jim Grosbach authored Nov 10, 2011
```
rdar://10130228.

llvm-svn: 144331
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  9bded9dc
- Thumb1 diagnostics for reglist on PUSH/POP fix. · a113eb02
  Jim Grosbach authored Nov 10, 2011
```
Was not checking the first register in the register list.

llvm-svn: 144329
```
  a113eb02
Nov 10, 2011
- Check in getOrCreateSubprogramDIE if a declaration exists and if so output · 79278365
  Rafael Espindola authored Nov 10, 2011
```
it first.

This is a more general fix to pr11300.

llvm-svn: 144324
```
  79278365
- Thumb MUL assembly parsing for 3-operand form. · 5a5ce637
  Jim Grosbach authored Nov 10, 2011
```
Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.

rdar://10428630

llvm-svn: 144322
```
  5a5ce637
- build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler · 085f6f2a
  Daniel Dunbar authored Nov 10, 2011
```
that depends on MBlazeCodeGen. This is a layering violation that should really
be fixed.

llvm-svn: 144321
```
  085f6f2a
- build/MCDisassembler: Fix required libraries list of MCDisassembler to use · b27317f7
  Daniel Dunbar authored Nov 10, 2011
```
all-targets instead of an explicit list.

llvm-svn: 144320
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  b27317f7
- Make types and namespaces take multiple DIEs for the accelerator tables · 66b37db6
  Eric Christopher authored Nov 10, 2011
```
as well.

llvm-svn: 144319
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  66b37db6
- When in ARM mode, LDRH/STRH require special handling of negative offsets. · d1762e00
  Chad Rosier authored Nov 10, 2011
```
For correctness, disable this for now.
rdar://10418009

llvm-svn: 144316
```
  d1762e00