llvm-svn: 145596

sure we can emit both the high and low versions of those registers.

Fixes rdar://10392864

llvm-svn: 145579

llvm-svn: 145573

llvm-svn: 145553

remaining FMA4 instructions and intrinsics with tests.

llvm-svn: 145525

llvm-svn: 145517

llvm-svn: 145510

llvm-svn: 145508

llvm-svn: 145504

While at it remove the barcelona/instanbul/shanghai subtargets, they're
unsupported by GCC and look pretty broken.

llvm-svn: 145494

llvm-svn: 145493

X86: PerformOrCombine introduced a vselect node with a wrong order of operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479).

llvm-svn: 145488

llvm-svn: 145487

llvm-svn: 145485

Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node type for VPERMILPD/PS. Add instruction selection support for VINSERTI128/VEXTRACTI128.

llvm-svn: 145483

change intended.

llvm-svn: 145468

llvm-svn: 145464

(fptrunc (sqrt (fpext x))) -> (sqrtf x) transformation if -fno-builtin is 
specified.
rdar://10466410

llvm-svn: 145460

llvm-svn: 145458

llvm-svn: 145456

llvm-svn: 145454

tools use. Patch by Simon Atanasyan.

"mips32r1" => "mips32"
"4ke" => mips32r2"
"mips64r1" => "mips64"

llvm-svn: 145451

llvm-svn: 145450

Add another missing pattern. llvm-gcc likes f64 but clang likes i64 so it was generating poor code for some SSE builtins.

llvm-svn: 145448

llvm-svn: 145442

Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.

This also makes the AVX variants redundant.

llvm-svn: 145440

llvm-svn: 145422

llvm-svn: 145420

as MC is the only assembler we support.

This splits MS/Windows and GNU/Windows ASM infos into two seperate classes.
While there is currently only one difference, full MS C++ ABI support will
require many more.

llvm-svn: 145409

Added a test.
Thanks Bruno for reviewing the patch.

llvm-svn: 145403

llvm-svn: 145392

Fix issues in shuffle decoding around VPERM* instructions. Fix shuffle decoding for VSHUFPS/D for 256-bit types. Add pattern matching for memory forms of VPERMILPS/VPERMILPD.

llvm-svn: 145390

Fix VINSERTF128/VEXTRACTF128 to be marked as FP instructions. Allow execution dependency fix pass to convert them to their integer equivalents when AVX2 is enabled.

llvm-svn: 145376

Correctly mark VPERM2F128 as being an FP instruction and add execution domain fixing support to convert it to VPERM2I128 for AVX2.

llvm-svn: 145370

Replaces r145318 with a more targetted fix for the relocation handling.

llvm-svn: 145346

llvm-svn: 145272

uninitialized: GCC doesn't understand that the variables are only used
if !UseImm, in which case they have been initialized.

llvm-svn: 145239

Add X86 instruction selection for VPERM2I128 when AVX2 is enabled. Merge VPERMILPS/VPERMILPD detection since they are pretty similar.

llvm-svn: 145238

llvm-svn: 145218

Merge detecting and handling for VSHUFPSY and VSHUFPDY since a lot of the code was similar for both.

llvm-svn: 145199